Interfaces used in telecommunication and data communications


    The most common serial interface used today by computer manufacturersis the RS-232. This serial interface found on practically every PC and external modem (and many other devices). RS-232 is simple, universal, well understood and supported everywhere.

    The RS-232 standard was originally issued in 1969 by EIA(Electronics Industries Association) for single purpose: to interconnect terminals (Data Terminal Equipment, DTE)to data communication devices (Data Communication Equipment, DCE)like modems. When RS-232 is used to interface terminals to modems,it is simply connecting respective pins in the two devices(modem and terminal). The original standard specifications (RS-232C / CCITT V.24) specified the maximum transmission speed to be 20 000 bits/s and maximum cable distance to be 15 m / 50 feet.

    However. RS-232 is often used to interconnect terminals to computersor computers to peripheral equipment. The standard never specified suchoptions, so this kind of interfacing usually requires special consideration (sometimes special custon cables like "null modem" or similar). Some applications also use the interface with higher data retes (PCs for example support up to 115200 bps) and/or longer cables (up to 100 meters can work at slow distances well on good cable). RS232 defines the electrical and physical standard. RS232C indicates it is wired using a DB25 connector (pinout diagram) rather than a DB9 (TIA 574) or an RJ45 (8 Position Modular Connector that is mentioned in RS232D standard).

    The RS-232 is a pluggable signal interface which uses D-shaped 25-pin connector (some implementations use also non-standard connectors like 9-pin in modern PCs). The RS-232 wiring should not preferably be longer than 50 feet for reliable operation. Many times a longer cable will work at limited speed and limited reliabity. The original RS-232 standard only specified the data speeds up to 19200 bps, but the RS-232 ports in many modern PCs can go much higher (115200 bps istypical limit on PCs).

    The essential feature of RS-232 is that the signals are carried as single voltages referred to a common earth on pin 7 on 25 pin connector (pin 5 on 9-pin connector). The output signal level usually swings between +12v and -12v (standard specifies +6..+15V and -6..15V). In RS-232 anything higher than +3V is considered to be logic 0 and anything lower than -3V is considered to be logic 1. The "dead area" between +3v and -3v is designed to absorb line noise. In the various RS-232-like definitions this dead area may vary but they are designed always in such way that they work well with standard compliant transmitters (operation with transmitters that does not fullfill the standard definitions fully can vary). For instance, the definition for V.10 has a dead area from +0.3v to -0.3v. Many receivers designed for RS-232 are sensitive to differentials of 1 volt or less. In practice the RS-232 ports are designed typically so that the level where the port makes decision between logic 1 and 0 is set somewhere between 0V and +3V. In this way the devices without power (signals at 0V) do not cause problems of uncertain signal condition. Typical PC serial ports are built in this way.

    Note on some non-standard implementations: There are some "RS-232 compatible" devices aroudn that use reduced +/-5V output signal levels on their output. Those do not meet the RS-232 specifications, but in practice work with short cable runs. There are some DIY electronics circuits around that feed only +5V and 0V to serial port, they definately do not meet the original standard, but work in practice with a tpyical PC serial port with short cable. In practice "RS-232 compatible" seems to mean that product manufacturer does not no any way the device would not work with another device that meets RS-232 standard. Sometimes when you connect two "RS-232 compatible" devices together, they might not work with each other because neither of them fully meet RS-232 specs and they have used conflicting shortcuts in their port implementations.

    Data in RS-232 interface is transmitted and received on pins 2 and 3 respectively. Data set ready (DSR) is an indication from the Dataset (i.e., the modem or DSU/CSU) that it is on. Similarly, DTR indicates to the Dataset that the DTE is on. Data Carrier Detect (DCD) indicates that carrier for the transmit data is on.Pins 4 and 5 carry the RTS and CTS signals. In most situations, RTS and CTS are constantly on throughout the communication session. However where the DTE is connected to a multipoint line, RTS is used to turn carrier on the modem on and off. On a multipoint line, it is imperative that only one station is transmitting at a time. When a station wants to transmit, it raises RTS. The modem turns on carrier, typically waits a few milliseconds for carrier to stabilize, and raises CTS. The DTE transmits when it sees CTS up. When the station has finished its transmission, it drops RTS and the modem drops CTS and carrier together.

    The 25-pin RS-232 connector has also pins originally defined for clock lines. The clock signals are only used for synchronous communications. The modem or DSU extracts the clock from the data stream and provides a steady clock signal to the DTE. Note that the transmit and receive clock signals do not have to be the same, or even at the same baud rate. Most RS-232 implementations today do not support syncronous communications (for example normal PC RS-232 ports do not implement syncronous communications).

    Standard RS-232 pinout on 25-pin connector (RS-232C):
    Pin No. Name Notes/Description
    1 - Protective/shielded ground
    2 TD Transmit Data (a.k.a TxD, Tx)
    3 RD Receive Data (a.k.a RxD, Rx)
    4 RTS Request To Send
    5 CTS Clear To Send
    6 DSR Data Set Ready
    7 SGND Signal Ground
    8 CD Carrier Detect (a.k.a DCD)
    9 - Reserved for data set testing
    10 - Reserved for data set testing
    11 - Unassigned
    12 SDCD Secondary Carrier Detect
    13 SCTS Secondary Clear to send
    14 STD Secondary Transmit Data
    15 DB Transmit Clock (a.k.a TCLK, TxCLK)
    16 SRD Secondary Receive Data
    17 DD Receive Clock (a.k.a. RCLK)
    18 LL Local Loopback
    19 SRTS Secondary Request to Send
    20 DTR Data Terminal Ready
    21 RL/SQ Signal Quality Detector/Remote loopback
    22 RI Ring Indicator (used for auto answer applications)
    23 CH/CI Signal Rate selector
    24 DA Auxiliary Clock (a.k.a. ACLK)
    25 - Unassigned

    NOTE: Leave all pins not specified above unconnected.

    De-facto PC standard to wire RS-232 to 9-pin connector (EIA/TIA 574):
    Pin No. Name Notes/Description
    1 DSR/RI Data set Ready/ring indicator
    2 DCD Data Carrier Detect
    3 DTR Data Terminal Ready
    4 SGND Signal Ground
    5 RD Receive Data
    6 TD Transmit Data
    7 CTS Clear to Send
    8 RTS Request to Send

    RS232 on RJ45 (RS-232D) (EIA/TIA - 561):
    Pin No. Name Notes/Description
    1 DSR/RI Data set Ready/ring indicator
    2 DCD Data Carrier Detect
    3 DTR Data Terminal Ready
    4 SGND Signal Ground
    5 RD Receive Data
    6 TD Transmit Data
    7 CTS Clear to Send
    8 RTS Request to Send

    When connecting RS-232 devices keep in mind that thereare three possibilities for flow control handshaking: no handshaking (none), hardware flow control (RTS/CTS)and Xon/Xoff (special flow control characters).

    The History of RS-232 is long. In the early 1960s, a standards committee, today known as the Electronic Industries Association (EIA), developed a common interface standard for data communications equipment. At that time, data communications was thought to mean digital data exchange between a centrally located mainframe computer and a remote computer terminal. These devices were linked by telephone voice lines, and consequently required a modem at each end for signal translation. It was thought that a standard was needed to enable the interconnection of equipment produced by different manufacturers, thereby fostering the benefits of mass production and competition. From these ideas, the RS232 standard was born. It specified signal voltages, signal timing, signal function, a protocol for information exchange, and mechanical connectors.RS-232 specification was renamed to the "EIA232 Standard" in the early 1990's. Their standard is still maintained by EIA/TIA. There has been also standardisation on this field in Europe.The ITU (International Telecommunications Union - formerly CCITT) defines the signal properties (names) in V.24 and the electrical properties in V.28. There is almost no practical difference between RS232 and V.24 (or V.28).

    The core of the most RS-232 port implementations is UART chip. UART is short for universal asynchronous receiver-transmitter. The universal asynchronous receiver transmitter (UART) protocol is commonly used to send low-speed data between devices. The term asynchronous is used because it is not necessary to send clocking information along with the data being sent. UART links are typically 38400 baud or less and are character-based. Because the transmitter and receiver operate asynchronously, there is no need to connect the transmit and receive clocks. Instead, the receiver oversamples the incoming data stream (usually by a factor of 8, 16 or 32) and uses some of these samples to determine the bit value. Traditionally, the middle 3 of the 16 samples are used when UART shift register receives incoming data on RXD pin. The value of the bit is determined by the majority of those samples; if all do not agree, the noise indication is turned on (could be noise counter). When a complete character has been clocked in, the contents of the receive shift register are transferred to the receive FIFO before proceeding to the receive buffer. The UART transmit shift register sends outgoing data on TXDx.

    Two UARTs can communicate using this system if the transmitter and receiver use the same parameters, such as the parity scheme and character length. When data is not sent, a continuous stream of ones is sent (idle condition). Because the start bit is always a zero, the receiver can detect when real data is once again on the line. The most popular protocol that uses asynchronous characters is the RS-232 standard, which specifies baud rates, handshaking protocols, and mechanical/electrical details. Control bits in the UART mode register define the length and format of the UART character. Bits are received in the following order:

    • 1. Start bit
    • 2. 5 to 8 data bits (lsb first)
    • 3. Address/data bit (optional)
    • 4. Parity bit (optional)
    • 5. Stop bits

    Besides character data sending UART specifies an all-zeros break character (line longer time on zero condition than the lenght of one character), which is typically used to mark the ends a character transfer sequence (some protocols can use this some some other special uses).

    All standards provide handshaking signals, but some systems require only three physical lines?Tx data, Rx data, and ground. Many proprietary standards have been built over the years around the UART?s asynchronous character frame, some of which implement a multidrop configuration where multiple stations, each with a specific address, can be present on a network.

    Practically every computer contains a UART to manage the serial ports. UART is an integrated circuit used for serial communications, containing a transmitter (parallel-to-serial converter) and a receiver (serial-to-parallel converter), each clocked separately. The parallel side of a UART is usually connected to the bus of a computer. When the computer writes a byte to the UART's transmit data register (TDR), the UART will start to transmit it on the serial line. The UART's status register contains a flag bit which the computer can read to see if the UART is ready to transmit another byte. Another status register bit says whether the UART has received a byte from the serial line, in which case the computer should read it from the receive data register (RDR). If another byte is received before the previous one is read, the UART will signal an "overrun" error via another status. Data on the serial line is formatted by the UART according to the setting of the UART's control register. This may also determine the transmit and receive baud rates if the UART contains its own clock circuits or "baud rate generators". If incorrectly formated data is received the UART may signal a "framing error" or "parity error". Often the clock in UART will run at 16 times the baud rate (bits per second) to allow the receiver to do centre sampling - i.e. to read each bit in the middle of its allotted time period. This makes the UART more tolerant to variations in the clock rate ("jitter") of the incoming data. An example of a late 1980s UART was the Intel 8450. It was used in first IBM PC computers. In the 1990s, newer UARTs were developed with on-chip buffer space for data. This allowed higher transmission speed without data loss and without requiring such frequent attention from the computer. For example, the Intel 16550 has a 16 byte FIFO. The UART's serial connections to outside world usually go via separate line driver and line receiver integrated circuits which provide the power and voltages required to drive the serial line and give some protection against noise on the line. Once 1488 transmitter and 1489 receiver were common ICs for doing those conversion. Nowaays MAX232 and and many similar ICs that can work from single +5V power supply (produce needed higher voltages internally from +5V) are commonly used.

    RS-232 has some serious shortcomings as an electrical interface. Firstly, the interface presupposes a common ground between the DTE and DCE. This is a reasonable assumption where a short cable connects a DTE and DCE in the same room, but with longer lines and connections between devices that may be on different electrical busses, this may not be true. Large differences in the ground potentials of different devices can cause anything from communications errors to equipment damages and even burnt cables. If you need a reliable communications on hard environments or long distances, you need quite often use RS-232 signal opto-isolators (available from industrial electronics suppliers).

    Secondly, a signal on a single line is impossible to screen effectively for noise. By screening the entire cable one can reduce the influence of outside noise, but internally generated noise remains a problem. As the baud rate and line length increase, the effect of capacitance between the cables introduces serious crosstalk until a point is reached where the data itself is unreadable. Crosstalk can be reduced by using low capacitance cable and controlling of slew rate in the signal (i.e., making the signal more rounded, rather than square, thus reduces crosstalk). The standards for RS-232 and similar interfaces usually restrict RS-232 to 20kbps or less and line lengths of 15m (50 ft) or less. These restrictions are mostly throw backs to the days when 20kbps was considered a very high line speed, and cables were thick, with high capacitance. However, in practice, RS-232 is far more robust than the traditional specified limits of 20kbps over a 15m line would imply. Usually you can have longer cable or higher speed without much problems. The 15m limitation for cable length can be stretched to about 30m for ordinary cable, if well screened and grounded, and about 100m if the cable is low capacitance as well. Interestingly enough, most RS-232 ports on mainframes and midrange computers are capable of far higher speeds than their rated 19.2kbps. Usually these "low speed" ports will run error free at 56kbps and above. RS-232 ports on PCs are typically running at 115kbps max speed.


    RS-485 is a serial interface standard for communicating data at relatively high speed over twisted pair wiring. It uses differential signaling. RS-485 communications can provide longer range and better noise immunity than RS-232. RS-485 is often used in configurations where there is one transmitter and many receivers. RS-485 has also a flixible multidrop capability, where there can be multiple transmitters on the bus (only one transmitting at a time).

    Because typical RS-485 system does not have separate transmit and receive lines, RS-485 requires special flow control mechanism implemented in the protocol if this multidrop capability is used. There are also systems that use RS-485 interface through 4-wire interface, where one line is sent data from master and other pair is multi-drop data line fro data from the slaves back to master.

    The RS-485 standard defines only the electrical characteristics of the bus system. The actual protocol and the communication speed(usually between 20 kbps and 12 Mbps) vary between different application.

    In some basic applications asyncronous signals similar to RS-232 are used (just RS-485 electrical signal levels), or some slight modification of it. For example system like Profibus and DMX-512 use this kind of method. In some multidrop network implementations the protocol carries 9-bit data words, in which the ninth (parity) bit identifies each word as address or data. There are also RS-485 networks that use data formats completely different from "normal serial communications".

    RS-485 interface is used in very many control networking applications(including for example Profibus). RS-485 is a bus type network. It can be used for bidirectional communication between many devices connected to a bus consistong of one wire pair. EIA-485-A (commonly refered to as RS485) which is a balanced system that uses differential signaling. The signal voltage is is between the 2 data lines (let's call them here A and B). The difference between the A and B wire voltages is what isimportant: data high (digital 1) is if pin B is at a higher voltage than pin A, data low (digital 0) is if pin A is at a higher voltage than pin B. Typicaly the pin A and B are at either +5 or 0 Volts, but the RS485 limits are +12 and -7 Volts. In other words, the data is carried over a twisted pair. The transmitting device has a RS485 driver (transmitter) connected to A & B wires, and transmits uses +5 and 0 volt levels with respects to the transmitting devices ground. There must be a difference of at least 200mV between A and B wires for the logic state to be reliably detected. In receiver side wires A & B need to be within a few volts with respect tothe receivers 0V reference. The RS485 reciever pins will tolerate -7V to +12V relative to signal ground, but you must have the signal ground connected for reference, or the voltages can easily float outside this range and blow up the RS485 chip (which happens frequently in real life because people think that the common connection on pin 1 is just a screen and don't connect it through).

    Differential signals radiate less than single-ended signals doand work better in noisy environments. If the two complementary signals of a differential pair are perfectly balanced, the separation between bus wires determines the degree of field cancellation. If two complementary signals are not perfectly balanced, then the degree of attainable field cancellation is limited to a minimum value determined by the common-mode balance of the differential pair. Because the common-mode balance of most digital drivers is not particularly good, differential pairs often radiate far more power in the common mode than in the differential mode. In receiving end the receivers are designed to cancel the common mode signal, so with a poor transmitter you might get lots of radiated EMI but signals are still get good shielding agains external interference on entering the signals on the wire.

    The RS-485 bus cable shall be terminated at both ends with a suitable termination resistor that matches the impedance of the used medium (twisted pair wiring). The purpose of the termination is to prevent the reflection of data at the ends of the cable 120 ohm resistance is recommended for this termination. It matches well the commonly used twisted pair communcation cables (they have typically 100-140 ohm impedance). With this termination resistor the RS-485 system works well with twisted pair cables that has impedance of 100-120 ohms (like typical telephone pairs, CAT5 wiring, some shielded twisted pair cables). If there is no active driver on the network the line can be forced into a known idle state with a fail-safe circuit. This fail-safe circuit is complemented by a pulldown resistor and a pullup resistor. This supplement forces the differential mode voltage (i.e. the voltage between the conductors) to a well defined value when no station is transmitting (during the idle periods). Without this circuit it is likely that the line will pick up noise and falsely trigger the receivers leading to problematic communications.

    Usually RS-485 systems are built so that there is the differential pair which carries the signal plus some ground (usually a shield on cable, can be also mains ground). The ground is usually needed to keep the common voltage within limits (signals must be between +12 and -7V in receiver) and connected to receiver. Theoretically you could get the same effect by averaging the line voltage (2 resistorsand a cap) and then subtracting 2.5V to re create a virtual 0V referencefor the recever chip which would allow the use of a simple 2 wire line, but I do not know of anyone doing this.)

    Remeber that RS-485 is just electrical specification and can run a large variety of communication protocols vat various speeds. In simplest applications you can usually just use standard serial protocols that are used on rs-232 ports andyou will do just fine. A RS-232 is more susceptible tonoise than RS-485 and RS-485 can be just used to move the same protocol over greater distances than RS-232. In case you have many transmitters and receivers at the same bus, you might soemtimes need something else than simple serial communications to manage this situation.

    In many RS-485 communications you ca just get an RS-232 to RS-485 convertor and then write code that opens the serial portsand does serial things like would using RS-232. When using an RS-232 to RS-422/485 converter it is important to remember that an RS-485 driver sometimes has to enter tri-state or become a receiver. Normally the RTS signal from the RS-232 circuit is used to control the state of the converter. To work correctly the RTS signal from the RS-232 device must go high for the duration that data is being transmitted from it and go low to allow the converter to receive any message back. If this signal is not available then it is necessary to use converters that can control the data direction from received data alone. If you use a converter that does automatically the data direction handling, don't drive it too fast. Those converters have some time they need to switch the direction (some this kind of converters take up to around 1/2 - 3/4 second to switch direction). Unless you acknowledge this, you can run into problems. The switchign speeds vary from converter to converter, but generally with almost any converter you get switching problems at anything over 9600. Some 232-485 converters with automatic switching are VERY bad. A simple RS-232 to RS4xx Converter should not do any switching. But, you have to user 4 wires (2 pairs) instead of 3 (RX, TX and GND) to allow full-duplex communications. If someone expects switching, this behaviour has to be programmed in some way; either by RTS and obying CTS or by timing-loops or in any other fashion. The intelligent external converter counts the number of bits after the start bit to find out when the (last) stop bit ended and then disablethe transmitter, if no new start bit appear immediately after the laststop bit of the previous character. The converter needs to know theline speed and character length (number of data bits, parity bit andstop bits) in order to know when the character has been completed. Usually these are set by a DIL switches. The quick and dirty (non conforming) alternative is to control the RTS(Transmit enable) pin directly by the RS-232 TX data stream. The transmitter is activated only when the Space ("0") bit is to betransmitted. When the RS-232 Tx pin is in the Mark ("1") bit state,the RS-485 transmitter is disabled and it goes to tri-state. The pull-up/pull-down resistors will set the line to the Mark state and the receiver(s) will sense the "1" bit. This trick does of course notconform to the RS-485 standard, but it works in many situations. You may have to do your own echo cancellation in software if the RTS pindoes not disable the receiver. With windows (standard NT or W2K - no extensions or other hacks needed), you can set the com port to activate RTS when something is being transmitted, and deactivate it when there is nothing being transmitted. I haven't measured the jitter in the RTS signal compared to the end of transmission, but it seems to work in many applications. When designing such systems, I make apoint of having the slave device wait a few milliseconds before replying, tocater for slight jitters, but it is not as much as 10 msecs. To make this work well you either need a special UART in which the Tx shift register empty status bit directly controls the RTS signal, which then controls thetransmit enable/Rx disable pin, use an external intelligent RS-232/485controller or use the tri-state trick, which is not standard compliant. Using a proper RS-485 card with proper hardware handshake is the simplest solution.

    The official name for RS485 sepecification is standard ANSI/TIA/EIA-485-A-1998 Electrical Characteristics of Generators & Receivers for Use in Balanced Digital Multipoint Systems. EIA-485-A is compatible with: ISO/IEC 8482:1993 Information Technology - Telecommunications and information exchange between systems - Twisted pair multipoint interconnections.

    The transmission line of choice for RS485 applications is a twisted pair. There are coaxial cables (twinaxial) made for this purpose that contain straight pairs, but these are less flexible, more bulky, and more costly than twisted pairs. Many cable manufacturers offer a broad range of 120W cables designed for RS485 applications. Losses in a transmission line are a complex combination of DC conductor loss, AC losses (skin effect), leakage and AC losses in the dielectric. In good polyethylene cables such as the Belden 9841, the conductor losses and dielectric losses are of the same order of magnitude, leading to relatively low over all loss (for example 0.2 dB / 100 feet at 100 kHz, 0.6 dB / 100 feet at 1 MHz and around 2 dB / 100 feet at 10 MHz). When using low loss cables, speeds up to 100 kbit/s can use cable distances up to 4 kilofeet, when speed increases the cable distance drops according it, being 200 feet at 1 Mbit/s and around 40 feet at 2.5 Mbit/s. Those digures can be used as a guideline for choosing the maximum line length for a given data rate. With lower quality PVC cables, the dielectric loss factor can be 1000 times worse. PVC twisted pairs have terrible losses at high data rates (>100kBs), and greatly reduce the maximum cable length. At low data rates however, they are acceptable and much more economical. The twisted pair cables (CAT5, CAT5e, CAT6) designed for LAN applications and structured cabling systems are suitable for use with RS-485 system. Those cables work have impedance of 100 ohms, and work well when the system terminated is matched to 100 ohms (usually work acceptably with original 120 ohm termination).

    The proper termination of the cable is very important. If the cable is not terminated with it?s characteristic impedance, distorted waveforms will result. In severe cases, distorted (false) data and nulls will occur. If the cable is loaded excessively (much lower than 120 ohm termination), the signal initially sees the surge impedance of the cable and jumps to an initial amplitude. The signal travels down the cable and is reflected back out of phase because of the mistermination. When the reflected signal returns to the driver, the amplitude will be lowered. The width of the pedestal is equal to twice the electrical length of the cable (about 1.5ns/foot). If the cable is lightly loaded (much higher than 120 ohm termination or no termination at all), , the signal reflects in phase and increases the amplitude at the driver output. You can teast the quality of termination by feeding suitable square wave signal to the cable from RS-485 driver and looking at the signal waveform on the line with an oscilloscope. An input frequency of 30kHz is adequate for tests out to 4000 feet of cable.

    Cable termination resistors are necessary to prevent unwanted reflections, but they consume power. The typical differential output voltage of the driver is 2V when the cable is terminated with two 120W resistors, causing 33mA of DC current to flow in the cable when no data is being sent. In cases where this loss cannot be tolerated one way to eliminate the unwanted current is by AC coupling the termination resistors. The coupling capacitor must allow high-frequency energy to flow to the termination, but block DC and low frequencies. The dividing line between high and low frequency depends on the length of the cable. The coupling capacitor must pass frequencies above the point where the line represents an electrical one-tenth wavelength. The value of the coupling capacitor should therefore be set at 16.3pF per foot of cable length for 120W cables. With the coupling capacitors in place, power is consumed only on the signal edges, and not when the driver output is idling at a 1 or 0 state. A 100nF capacitor is adequate for lines up to 4000 feet in length. The power savings start to decrease once the data rate goes up. Most real-life RS-485 systems are DC terminated.

    Grounding is essential to reliable operation of any RS485 network. It is also the most overlooked and least understood. The differential signal does not require a signal ground to communicate, but the ground connection serves aa other important purpose. With distances of up to thousands of feet significant differences in the ground voltage level are possible. The RS-485 networks can mostly supply a correct data thransmission with a voltage difference of -7 to +12 Volts. If the ground voltages differ more than that, data could get lost and the ports could get damaged.

    The proper way is to do the siognal grounding though the signal cable shield. The signal ground connection in the cable ties the signal grounds of each of the nodes together to one single common ground. Using a shielded cable and connecting the shield to signal ground on both ends is the preferred method. It gives normally the best ground reference and best EMC performance.

    Usually the easiest way to ground your RS485 network is to simply use "Earth" ground as your return path. Although easy this may not be the best method for grounding your application, because current leaking from equipment, electro-static discharge (ESD), and lightning all drive current through this path which results in high noise content. The reason for this increased noise level is due to the fact that "Earth" ground presents a relatively high resistance. RS485 is designed to operate normally with a ground potential difference of +/- 7 Volts. During normal operations this is typically not a problem, however during fault conditions or lightning strikes even within ? mile the ground potential difference can reach hundreds and in some cases thousands of volts. This will most likely result in damage or failure of one or more devices on the RS-485 network. If the differences in signal grounds exceeding, optical isolation is the best choice.

    Many RS485 products are protected against ESD transients (for example up to 2kV using the human body model 100pF + 1.5kohm). However, some applications need more protection. Uually the best protection method is to connect a bidirectional TransZorb? from each line side pin to ground. A TransZorb is a silicon transient voltage suppressor that has exceptional surge handling capabilities, fast response time, and low series resistance.


    The V.35 interface was originally specified by CCITT as an interface for 48kbps line transmissions. It has been adopted for all line speeds above 20kbps, and seems to have acquired a life of its own. V.35 is a mixture of balanced (like RS422) and common earth (like RS232) signal interfaces.

    The control lines including DTR, DSR. DCD, RTS and CTS are single wire common earth interfaces, functionally compatible with RS-232 level signals. The data and clock signals are balanced, RS-422-like signals. The control signals in V.35 are common earth single wire interfaces because these signal levels are mostly constant or vary at low frequencies. The high-frequency data and clock signals are carried by balanced lines. Thus single wires are used for the low frequencies for which they are adequate, while balanced pairs are used for the high-frequency data and clock signals.

    The V.35 interface is typically found on DTE and DCE equipment interfacing to high speed digital carrier services. V.35 interface has been around for quite some time and was originally designed for a 48K bps modem but it has been shown to cope speeds up to 2 Mbit/s and even faster. This interface is most often used with equipment which connect data circuits to syncronous telecommunication network and with some fixed line modems.

    The V.35 plug is standard. It is a black plastic plug about 20mm by 70mm, often with gold-plated contacts and built-in hold down and mating screws. The V.35 plug is an expensive special plug, making everything to do with V.35 somewhat expensive. The V.35 plug costs roughly 30 times the price of a DB25. V.35 plug is too large to fit on many add-in cards, such as those used by PCs, thus there is very often a non standard cable used to connect a V.35 system, terminating in a DB25 at one end and a V.35 plug at the other.

    Please note that V.35 no longer officially exists as a ITU standard. It has been replaced by V.10/V.11. You can still though see references to this interface.V.35 was specified to use a 37 pin connector (the chunkiest in the world). Nowadays for high speed serial connections (that use the term V.35) most manufacturers use a DB25 connector with EIA/TIA RS-530A standard pinout or a non-standard pinout.

    V.35 on DB25 (RS-530-A) pinout:
    Pin No. Name Notes/Description
    1 Shield -
    2 Transmit Data (A) -
    3 Received Data (A) -
    4 RTS (A) Request To Send
    5 CTS (A) Clear To Send
    6 DCE Ready Data Communications Equipment Ready (modem/CSU)
    7 Signal Common -
    8 DCD (A) Data Carrier Detect (a.k.a CD or RLSD)
    9 Receiver Signal Element Timing (B) RX Clock
    10 DCD (B) Data Carrier Detect (a.k.a CD or RLSD)
    11 Ext Transmit Clock (B) -
    12 Tramsmit Signal Element Timing (B) TX CLOCK
    13 CTS (B) Clear to Send
    14 Transmitted Data (B) Secondary Transmit Data
    15 Transmit Signal element Timing (A) TX CLOCK
    16 Received Data (B) RX Data
    17 Receiver Signal Element Timing (A) RX CLOCK
    18 Local Loopback -
    19 RTS (B) Request to Send
    20 DTE Ready Host end
    21 Remote Loopback -
    22 RI Ring Indicator
    23 Signal Common -
    24 Ext TX Clock (A) -
    25 Test Mode -

    The A and B on the table refer to each signal pair used in balanced serial interfaces. Please note that this 530-A pinout specification, the earlier RS-530 (without the A suffix) standard is wired differently.

    • RS-232, RS-422 and V.35 interfaces - short description of interfaces    Rate this link
    • V.35 Interface - description of the interface    Rate this link
    • V.35 Interface - connector picture and pinout    Rate this link
    • V.35 on DB25 (RS-530-A)    Rate this link
    • V.35 Technical Reference - V.35 has been around for quite some time. It was originally designed for a 48 kbps synchronous modem - that's right, officially its top rated speed is 48 kbps. However, V.35 has been used for many years in applications running from 20 kbps up to and past 2 Mbps. In 1989, CCITT BLUE BOOK (ITU) recommended the interface become obsolete and replaced it with the V.10/V.11 standard. However, V.35 still remains popular, and has evolved to using the specifications from V.11 for the differential signals, while the control signals remain unbalanced. The V.11/V.35 BLUE is fully interoperable with the old V.35 RED interface, except V.35 RED may not handle the speed and distance of the newer spec.    Rate this link


    The X.21 interface was recommended by the CCITT in 1976. It is defined as a digital signalling interface between customers (DTE) equipment and carrier's equipment (DCE). And thus primarally used for telecom equipment. X.21 is a digital signaling interface recommended by ITU-T that includes specifications for DTE/DCE physical interface elements, alignment of call control characters and error checking, elements of the call control phase for circuit switched services, data transfer at up to 2 Mbps, and test loops. 64 kbps is the most commonly used transfer rate. All signals are balanced. Electrically the X.21 signals are the same as RS422 (X.27 / V.11). This interface normally uses 15-pin D-connector as the interface. ISO 4903 standard defines this 15-pole DTE/DCE interface connector and contact number assignments.Recommendations X.24, X.26 and X.27 are applicable. X.26 support speeds up to 100 kbps. X.27 extends possible speeds up to 10 Mbit/s.

    Current loop

    20mA transmission has its origins in the telex interfaces used by the post office. The technology was mainly applied to industrial terminal devices as well as computers in small and larger business systems. Devices of newer design no longer use the 20mA interface, generally favoring instead an RS485 bus interface.Until the early 1960?s, military teleprinters used 60 ma current loops to communicate over long distances. In 1962, the Model 33 teletype was introduced and 20 mA current loop interfaces became widely used. Throughout the 60?s, 70?s, and early 80?s, 20 mA current loop interfaces were applied in many types of equipment. Current loop interfaces became popular at this time because they offered the most cost effective approach to long distance, noise immune data transmission. The 20 mA current loop is suitable for distances to 2000 feet (650 meters) at data rates up to 19.2k baud with careful attention to interface design. It can be used at longer distances when data rates are as low as 300 baud.When the EIA 422 Standard (December 1978) and the EIA 485 Standard (April 1983) brought forth the application of balanced differential digital data transmission, the popularity of 20 mA current loop rapidly diminished.Current loops are still used widely in process automation. 20 mA are wirely used for transmitting serial communication data to programmable process controlling devices. The reason for their use there is that they are quite immune to noise and easy to opto-isolate. The 20mA or current loop interface transmits the serial data by switching a 20mA current on and off in a loop in synch with the data bits. In the rest state or during transmission of "1" bits, a constant current of 20 mA flows, whereas "0" bits are indicated by an interrupted current flow. Within each current loop only one connected device is allowed to provide the required 20mA loop current. This device is referred to as active, and the other as passive. Decoupling of the user signals from the current loop is generally accomplished using optocouplers. This ensures in most applications that there is galvanic isolation between the connected devices.In digital communications 20 mA current loop is a "de-facto"standard. The transmiter will only source 20 mA and the receiver will only sink 20 mA. Current loops often use opto-couplers. Current is current which matter, the voltages don't matter. Unfortunately there is no standard regulating the 20mA interface, so that the market is characterized by a number of differently designed current loop interfaces. The connector form factor and configuration likewise differ among manufacturers, for example the signal names and the options for active and passive mode. The data trasmitted though this kind of onterface is usually a standard RS-232 signal just converted to current pulses: current on and off depending the logic state of RS-232 circuit. The standard use of current is such that MARK means that 20 mA current is flowing and space tells that no current is flowing.Current Loop is a reliable low baud rate, 20kp/s or less. All devices one the bus or "in the current loop" are wired in a series circuit. Up to 10 devices can be wired in a typical current loop circuit. Current loop interfaces are usually divided to two types: active and passive. Many devices have ports that can be wired to both modes. In "passive mode" the receiver just has one optoisolator input LED wired to the line. Passive mode transmitter just either passes through the 20 mA current or does not pass any current. Passive transmitters and receivers are usually opto-isolated. Active transmitter actively transmit the 20 mA current from some power source or transmit no current depending on logic state needed to be transmitted. Active receiver is basically just a combination of passive receiver and 20 mA constant current source.Current loops can be wired in such way that they have one active interface and one or more passive interfaced wired to one loop. Current loops can be also built using just passive interfaces and an external 20 mA current source.

    Low Voltage Differential Signaling (LVDS)

    Low Voltage Differential Signaling (LVDS) is an electrical interfacethat can quickly handle a large amount of data over long cable lengths. LVDS is a Low Voltage Differential Signaling device which extends the performance of the commonly used RS-422 differential data bus. RS-422 limits the frequency to the 20 MHz range. However, LVDS clock support is over 65MHz (66 MHz NSC 65 MHz TI) and improves the signal transmission cable length 30 to 100 feet. It also reduces EMI significantly. The LVDS device is now called RS-644 and is pin-to-pin compatible with standard RS-422 transmitters and receivers.

    There are currently several industry standards that define LVDS including ANSI/TIA/EIA-644 (EIA-644) and IEEE 1596.3. LVDS (low-voltage differential signaling) is a leading-edge technology that provides high-speed data transmission for backplane and cable applications. It is fast and robust and requires little power. Originally intended for point-to-point applications, LVDS can extend into multipoint, or party-line, applications and offer the potential to increase signaling rates fivefold over existing multipoint technologies. The TIA (Telecommunications Industry Association) has recognized the multipoint version of LVDS, M-LVDS, under the TIA/EIA-899 interface standard.EIA/TIA-644 Balanced (differential) interface [LVDS]; defines the Electrical layer (Receiver and Transmitter) only. Designed with an output voltage swing of 350mV at better then 400Mbps into a 100 ohm load, across a distance of about 10 meters. LVDS uses a single 100 ohm termination resistor at the Receiver side of the bus. The Receiver provides failsafe bias so Pull-up/down resistors are not normally required. The type of cable determines cable length; Category 3 (CAT3) for 10m in length, CAT5 for longer runs (~20 meters @ 100Mbps, ~50 meters @ 50Mbps, ~100 meters @ 10Mbps). Ribbon cable may be used for sub meter runs.There are several variations of LVDS is use:

    • LVDS [EIA-644], Low Voltage Differential Signaling; 3.5mA drive, at 655Mbps max, Point-to-Point
    • BLVDS Bus LVDS, [Proprietary] 10mA drive designed to handle mulit-card low impedance backplane applications [One bus driver].
    • M-LVDS Multipoint LVDS [EIA-899], Addresses double terminated bus configurations also extends the common-mode range to +/-2 V. 11mA drive at 500Mbps max, 200/300Mbps typical for Multi-point
    • GLVDS Ground referenced LVDS, Places the driver output voltage offset closer to ground potential.
    • LVDM Low Voltage Differential Signaling Multi-Point, [Proprietary], 8mA with one bus driver.
    NOTE: EIA-644 [LVDS] should not be confused with other (higher speed) Low-Voltage Differential circuits; ECL, PECL, LVPECL, or CML, all of which also use the term LVDS.

    Telecommunication systems backplanes

    There are two broad classes of net topology used on backplanes, multi-point and point to point. In a multipoint backplane, all pins are connected to all logic cards.Communication takes place between two cards only after one card establishes a channel. In point to point data routing, each driver is connected to one receiver and uses a more carefully controlled transmission path.Typical computer buses (ISA, PCI) use multipoint architechire where the same parallel bus is connected to all the cards. This type of backplane systems (VME, passive motherboard ISA, CompactPCI) have used successfully in many applications.In a multipoint topology, each driver is connected to many receivers and typically each receiver is located on a separate daughtercard. This is the traditional method of implementing data transfer across a bus and works well up to bus speed of 100-200 Mbps. For the multi-point net topology the driving issues for connector selection are density and crosstalk. As optical links continue to increase both the speed and the total number of ports on logic cards, the backplane is playing an increasingly important role in keeping network traffic moving.Traditionally, backplane design has been difficult, and the task is usually given to the most experienced engineers on the team. Designing a good backplane architecture offers many advantages. Once you put them into service, some backplanes never die, and legacy constraints hang on like a plague of leeches. You might think, that if only you could redesign the backplane, then you could correct design errors someone made 20 years ago and finally free yourself of some forgotten engineer's mistakes.However, as signal frequencies rise, distortion and signal loss become more difficult to overcome. To some degree, technology is out of sync. Multipoint architectures appear to be running out of steam. As bandwidth needs increase, backplane design shifts to point-to-point star topologies using narrow, high-speed links. Above 200Mbps the signal integrity aspects become increasingly unmanageable and point to point net topology is used. In point to point data routing, each driver is connected to one receiver and uses a more carefully controlled transmission path. The backplane connector largely determines the electrical performance of this carefully controlled transmission path. For point to point net topologies crosstalk is still a factor but the link performance or bandwidth of the transmission path becomes the primary concern. Two point-to-point architectures are the star and the mesh topologies. In most cases, a star topology connecting each node though an intermediate switch provides sufficient capacity.Advances in high-speed serial links have accelerated the move from wide, relatively slow buses to narrow, high-speed channels, for which lower pin counts mean smaller connectors, easier routing, and less shielding. For several compelling reasons, some people believe that the future of backplanes is optical. Optical backplanes, however, are not without issues.

    • Breaking The 2.5-Gbit/s Barriers - as Gigabit Ethernet and OC-48/STM-16 nodes start permeating the communications industry, the bandwidth requirements on the line and across the backplane are increasing exponentially, 40-Gbit/s backplane bandwidths are commonplace today and traditional backplane bus structures are on the verge of extinction, the new buzzword is serial    Rate this link
    • Design Considerations for Gigabit Backplane Systems Tutorial - This tutorial explores high-speed backplane-interconnect system tradeoffs related to the effects on increases in bandwidth on the signal path from driver to receiver through printed circuit boards (PCBs)    Rate this link
    • Designing 2.1V Futurebus+ termination system requires system-engineering approach - designing a termination system for a Futurebus+ power system can be a formidable task    Rate this link
    • Differential signaling - The number of grounds depends on spacing and sizes of the connector pins and how they are bent.    Rate this link
    • Exploit the potential of high-performance CMOS by selecting best interface - High-speed-bus and point-to-point interfaces between CMOS ASICs are no longer limited to conventional CMOS-level signals. By using low-voltage interfaces in a differential, point-to-point, terminated-transmission-line environment, you can obtain data rates of several hundred Mbps. But, to accomplish this, you need to understand interface characteristics and requirements and the system limitations that affect maximum speed.    Rate this link
    • FAST backplane connectors disguise digital transmission lines - today's telecommunications and high-end computing designs demand backplane edge connectors that maintain signal integrity and provide high signal density for data rates up to 2.5 Gbps    Rate this link
    • Fiber lights the short haul - Innovative fiber-optic technologies for short-haul applications are breaking multiple bottlenecks and lighting the way to greater channel densities and a brighter outlook. Converging short-haul telecomm and datacomm fiber-optic-link requirements make a demand peak at data rates of 10 to 40 Gbps for links from a fraction of a meter to a few kilometers.    Rate this link
    • GTLP: An Interface Technology for Bus and Backplane Applications - Gunning Transceiver Logic (GTL), approved as a JEDEC Standard JEDS8-3 in 1993, was originally created as a reduced swing I/O driver technology to support high-speed buses and backplanes    Rate this link
    • High-speed-connector systems - In high-speed systems, you can't afford to look at connectors as just blobs of plastic and pins. Instead, adopt a systems approach that takes account of the connectors' complex interaction with other parts of the host-system design.    Rate this link
    • High-speed serial links benefit from advanced cabling - achieving low bit-error rates on short- and medium-length gigabit/sec links requires examining cable configurations and choosing the right coding and driver/receiver circuitry    Rate this link
    • Hot-swapping signals - Hot-swap designs were Once reserved for medical-support systems, telcomm, or other "high-reliability" installations. now everybody wants to swap with the lights on.    Rate this link
    • InfiniBand unleashed - Version 1.0 of InfiniBand, the result of a merger between the competing Next-Generation I/O and Future I/O specs, achieved ratification status on Oct 24, 2000. With strong silicon and software support, it is poised to change the way you build networks.    Rate this link
    • Improve Backplane Performance With Source-Synchronous Designs - source-synchronous interface is an ideal upgrade for passive backplanes and on-card buses    Rate this link
    • Interfacing Between PECL and LVDS Differential Technologies - System designers must familiarize themselves with the different I/O circuit configurations to understand the requirements for proper biasing and effective termination necessary to maintain good signal integrity between differing technologies. This application note will describe an approach to interfacing Positive Emitter Coupled Logic (PECL) with Low Voltage Differential Signaling (LVDS) technologies.    Rate this link
    • Live Insertion - Many applications require the ability to exchange modules in electronic systems without removing the supply voltage from the module (live insertion). To avoid damaging components, additional circuitry modifications are necessary. This document describes in detail the phenomena that occur during live insertion and presents circuit solutions for potential problems.    Rate this link
    • LVDS Enables High-Speed Signal Distribution in 3G Basestations - Low Voltage Differential Signaling (LVDS) will be the signaling standard of choice for delivering high speed data while minimizing space, noise, and power - critical constraints for basestation designs. This article discusses data and clock distribution applications using LVDS serializers, deserializers, multiport repeaters, crosspoint switches, and level translators. The focus will be on LVDS circuits, architectures, and specifications that are most relevant to 3G basestation design.    Rate this link
    • Multipoint standard boosts LVDS - Low-voltage differential signaling, or LVDS (TIA/EIA-644), has become extremely popular because of its high-speed and low-power characteristics for a wide range of applications. The technology's popularity will increase even further with the standardization of a new multipoint version: M-LVDS (TIA/EIA-899). Essentially, M-LVDS transceivers are intended for use on a multipoint bus where up to 32 nodes may be connected on the shared line.    Rate this link
    • Proper Serdes Selection Solves Serial Backplane Design Woes - As backplanes move into the 6.25-Gbit/s range and beyond, reflections, crosstalk, ISI, and noise become bigger issues for designers. Choosing the right serdes can help combat these problems.    Rate this link
    • Protecting high-speed buses at 1 Gbps and beyond - Circuit-protection trade-offs become more challenging as bit rate increases, but layered protection and new devices minimize the downside.    Rate this link
    • Serial backplanes supplant parallel buses in fast systems - point-to-point serial links borrowed from industry-standard storage interfaces provide an apt substitute for traditional parallel bus    Rate this link
    • Signal-integrity modeling of gigabit backplanes, cables, and connectors using TDR - The TDR (time-domain-reflectometry) method for signal-integrity analysis can help gigabit-system designers produce more accurate interconnect models, resulting in more reliable and higher performance designs.    Rate this link
    • Speeding up Comm Board Designs with Switch Fabrics - As speed requirements continue to skyrocket, current bus architectures are creating bottlenecks in today's infrastructure designs. By turning to an open switch fabric, designers may just have a way to curb the bottlenecks and improve overall performance in a system architecture.    Rate this link
    • StarFabric, PCI Express Hybrid Provides Evolution Path for Comms Designs - For many PCI users, the move to PCI Express Advanced Switching is the long-term goal. But, with the spec still under development, the move to PCI Express will still be some time off. By turning to StarFabric, designers can upgrade now and still have an evolution path to AS. Here's how.    Rate this link
    • System I/O Architects Envision a Packet-Switched Future - As legacy shared bus architectures struggle to cope with endlessly escalating bandwidth requirements, designers set their sights on serial interconnects capable of gigabit speeds    Rate this link
    • Testing gigabit serial buses: First, get physical - Verifying product designs that incorporate today's superfast interconnects and buses begins with modeling and simulating the physical layer when only components are available to test. And that testing is just the beginning.    Rate this link
    • VMEbus: a study in evolution and survival - In a time when new technologies become obsolete in mere months, the VMEbus has survived for more than 20 years, offering timely performance updates and protecting customer investments. Although the hardware is expensive and based on 20-year-old technology, VME has remained popular with many military, medical-, transportation-, and industrial-control-system developers because of its longevity, ruggedness, and open standards, and the large number of manufacturers offering off-the-shelf products.    Rate this link
    • Wrestlemania: keeping high-speed-backplane design under control - High-speed serial links are quickly becoming off-the-shelf parts. Unfortunately, designing with them isn't any easier.    Rate this link
    • Minimize the short-circuit current pulse in a hot-swap controller - Because of internal circuit-breaker delay and limited MOS-gate pulldown current, many hot-swap controllers do not limit current during the first 10 to 50 ?sec following a shorted output. The result can be a brief flow of several hundred amperes. A simple external circuit can counter this problem by minimizing the initial current spike and terminating the short circuit within 200 to 500 nsec.    Rate this link
    • Passive Channel Holds Key to 10-Gbit Backplanes - The focus on driving serial 10-Gbit/s speeds across a backplane is rapidly increasing in the communications sector. As these projects progress, a number of solutions have demonstrated transmission of serial 10 Gbit/s in a backplane environment, using non-return-to-zero (NRZ) signaling or alternate modulation schemes. The toughest issue being faced isn't lack of solutions, but a lack of definition of the true problem?understanding the requirements of overall system architectures and their interaction with the passive channel. Passive channel improvements are vital to achieving 10-Gbit serial connections across backplanes. But, these improvements may prove challenging because of associated cost, manufacturability, and physical realities of a system architecture.    Rate this link


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