Electronics trends for 2014

The Internet of Everything is coming. The Internet is expanding into enterprise assets and consumer items such as cars and televisions. Very many electronics devices needs to be designed for this in mind. The Internet of Things (IoT) will evolve into the Web of Things, increasing the coordination between things in the real world and their counterparts on the Web. Gartner suggests that the “the smart machine era will be the most disruptive in the history of IT.” Intelligent systems and assistive devices will advance smart healthcare.

Software-defined anything (SDx) is coming more into use. It means that many proprietary systems are being replaced with commonly available standard computer hardware and software running in them.

PC market: ABANDON HOPE all ye who enter here. Vendor consolidation ‘inevitable’. Even Intel had to finally admit this that the Wintel grip which has served it and Microsoft so well over the past decades is waning, with Android and iOS coming to the fore through smartphones and tabs. The market conversion to tablets means that consumers and businesses are sweating existing PC assets longer. Tablets to Make Up Half of 2014 PC Market.

The Rise, Fall, and Rise of Electronics Kits article mentions that many older engineers first became interested in electronics through hobbies in their youth—assembling kits, participating in amateur radio, or engaging in other experiments. The 1970s and 1980s were great times for electronics hobbyists. But whenever it seems that there’s nothing left for the hobbyist, a new motif arises. The Raspberry Pi has become a best seller, as has a similar experimental board, the Arduino microcontroller. A great number of sensors, actuators, cameras, and the like have quickly become available for both. Innovative applications abound in such domains as home automation and robotics. So it seems that now there is much greater capacity for creativity in hobby electronics then there ever was.

Online courses demand new technological approaches. These days, students from all corners of the world can sign up for online classes to study everything from computer science, digital signal processing, and machine learning to European history, psychology, and astronomy — and all for free.

The growth of 3-D printers is projected to be 75 percent in the coming year, and 200 percent in 2015. Gartner suggests that “the consumer market hype has made organizations aware of the fact 3D printing is a real, viable and cost-effective means to reduce costs through improved designs, streamlined prototyping and short-run manufacturing.”

E-Waste: Lack of Info Plagues Efforts to Reduce E-Waste article tells that creation of trade codes is necessary to track used electronics products according to a recent study concerning the waste from growing quantities of used electronics devices—including TVs, mobile phones and computers. High levels of electronic waste are being sent to Africa and Asia under false pretenses.” StEP estimates worldwide e-waste to increase by 33 percent from 50 million tons in 2012 to 65 million tons by 2017. China and the U.S. lead the world as top producers of e-waste. America produces about 65 pounds of e-waste per person every year. There will be aims to reduce the waste, for example project like standardizing mobile phone chargers and laptop power supplies.

1,091 Comments

  1. Tomi Engdahl says:

    The Ultimate Flyback: Power Integrations’ FluxLink Conversion Technology
    http://www.eeweb.com/blog/eeweb/the-ultimate-flyback-power-integrations-fluxlink-conversion-technology

    A challenge facing manufacturers of smart mobile devices, set-top boxes, networking equipment, and computer peripherals is to develop low-cost, efficient adapters and chargers that meet ever-more-demanding energy consumption regulations. For simplicity and cost reasons, fly-back designs using primary-side regulation (PSR) techniques would normally be favoured. However, secondary-side regulation (SSR) provides more accurate control and is less sensitive to production tolerances in the transformer and other external components.

    Until recently, designers faced this age-old choice: cost or performance. Now, a new approach has been developed which combines the simplicity of primary-side regulation solutions with the performance benefits of secondary-side control.

    Reply
  2. Tomi Engdahl says:

    NAND designs: Vendors hustle to get flash closer to compute
    PUSH that data faster, storage boy
    http://www.theregister.co.uk/2014/12/01/getting_flash_closer_to_compute/

    Multi-socket, multi-core CPUS are demanding entities: they have a gargantuan appetite for data which they suck up through a CPU-memory channel from DRAM, the server’s memory.

    This access happens in nanoseconds, billionths of a second. Getting data from places beyond memory, such as PCIe server flash cards, SSDs directly attached to the server or fitted to networked arrays, or disk drives, takes much longer and the compute core has to sit there, idling, waiting for the data it needs.

    In a modern factory, decades of mass-production, just-in-time delivery and build-to-order experience mean that any factory assembling process is designed so that all the components necessary are available, on hand just when needed. The whole point of factory processes is that an assembly line doesn’t stop, that multiple lines can operate at once, and that component logistics processes are in balance and deliver components in the right amounts and at the right speed to the assembly points in a production process.

    A server is a data factory and it has, at its apex, a simple – in outline – process involving bringing data to compute. here is a sequence of stages getting that data to compute, such as from disk or sensor to the server’s memory and then to the CPU cores. Fast caches are used to buffer slow data delivery sources downstream from memory.

    But server compute efficiency has improved in leaps and bounds, newer generations of processors, server virtualisation and current containerisation are enabling servers to run more applications, meaning the cores want more and more data – more immediately – with every compute cycle.

    A two-socket by eight-core server can often have a greater data need than its memory and downstream storage infrastructure can deliver at any one time.

    Flash memory improves data IO speed at whatever stage it is used in this downstream infrastructure and often this enough – put SSDs in the networked array to replace disks. Put flash caches in the array controller. Put SSDs in a server’s own directly-attached storage (DAS) slots. Put flash storage on PCIe flash cards which have faster data access than SATA or SAS-connected SSDs in the server’s DAS infrastructure.

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  3. Tomi Engdahl says:

    The Spec Dilemma
    http://www.eetimes.com/author.asp?section_id=36&doc_id=1324803&

    Specifying a product may seem straightforward, but is it really?

    All measured data comes from testing under certain conditions. If you vary the conditions, the specs can either be much better or much worse.

    Why can that be a problem? It’s not practical for manufacturers to provide performance data for every conceivable set of test conditions. Thus manufacturers often provide typical performance characteristics along with maximum or worst-case performance characteristics. The typical conditions are usually chosen to be those that the user is most likely to experience when using the device.

    Engineers are always surprised to see that a 24-bit ADC in a system will have effectively 14 or 15 bits of accuracy. And getting 15 bits of ENOB is excellent. Factors such as sampling speed, full scale range, temperature, etc., can change these results.

    Reply
  4. Tomi Engdahl says:

    Biz Break: Cypress Semiconductor buys Spansion in $4B Silicon Valley chip deal
    http://www.mercurynews.com/business/ci_27045416/biz-break-cypress-semiconductor-buys-spansion-silicon-valley

    Today: Two of Silicon Valley’s largest chip companies, Cypress Semiconductor and Spansion, agree to merge in a $4 billion

    Cypress Semiconductors and Spansion, two of the largest chip companies in Silicon Valley, announced Monday that they will merge in a $4 billion deal.

    “This merger represents the combination of two smart, profitable, passionately entrepreneurial companies that are No. 1 in their respective memory markets and have successfully diversified into embedded processing,” Rodgers said in a prepared statement.

    Spansion and Cypress are the 17th and 18th largest companies in Silicon Valley’s semiconductor sector, based on 2013 revenues, and rank Nos. 57 and 66 overall for tech companies, respectively.

    The companies expect their merger to bring down costs while creating a massive new firm.

    “Bringing together these high-performing organizations creates operating efficiencies and economies of scale, and will deliver maximum value for our shareholders, new opportunities for employees and an improved experience for our customers,” Spansion CEO John Kispert said in a statement.

    Reply
  5. Tomi Engdahl says:

    Cypress Bids $4B For Spansion
    http://www.eetimes.com/document.asp?doc_id=1324810

    In another sign of the consolidating chip industry, Cypress Semiconductor Corp. hopes to merge with Spansion in an all-stock deal valued at $4 billion. The deal would create an expanded embedded chip vendor with $2 billion in annual revenues, half in mainly NOR flash and SRAM memory with the rest split between microcontrollers and analog parts.

    T.J. Rodgers will remain as chief executive of the merged company under the Cypress name. Although Cypress is the slightly smaller of the two firms, it has had consistent profits while Spansion has been crawling its way into the black, in part due to the decline of its core NOR flash business.

    The combined companies will not have enough heft to break into the world’s top 20 chip vendors which these days requires nearly twice as much in revenues. However they claim they will be the world’s fourth or fifth largest supplier of chips to car makers. They will rank eighth in automotive microcontrollers and ninth in the overall MCU market.

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  6. Tomi Engdahl says:

    Biologists Grow Living Circuits
    Future maladies cured with bio-circuits
    http://www.eetimes.com/document.asp?doc_id=1324814&

    Genetic engineering takes cells and alters their genes so they perform functions different from what nature originally intended. A new trend uses circuitry to re-engineer the cell. These biological circuits “wire” naturally occurring cells into a circuit that performs a new function, such as filling in for the dopamine-generating cells destroyed by Parkinson’s disease.

    “Our ultimate goal, many years from now, is complex medical applications, such as injection of a circuit into the bloodstream that looks for cancer cells and, when it finds one, injects a drug,” Domitilla Del Vecchio, a professor at MIT, told EE Times. “Such a circuit would need a sensor, a computer, and an actuation component to inject the drug, and those are the kinds of components we are working on today.”

    Reply
  7. Tomi Engdahl says:

    Transformer Protection from Inrush Current – PTM Preview
    http://www.eeweb.com/company-blog/digikey/transformer-protection-from-inrush-current-ptm-preview/

    Digi-Key, in collaboration with Ametherm, presents a PTM describing transformer protection from inrush current using the NTC thermistor.

    Reply
  8. Tomi Engdahl says:

    Hardware by the Numbers: Part 1: Team + Prototyping
    https://medium.com/@BoltVC/hardware-by-the-numbers-part-1-team-prototyping-b225a33f55bf

    Everyone bemoans hardware. If I had a dollar every time I heard the phrase “hardware is hard” I would probably be sitting on a beach with a mai tai rather than typing this.

    Repeating “hardware is hard” ad infinitum doesn’t help anyone.

    It doesn’t help first-time founders navigate the prototyping process or find a Chinese contract manufacturer that will build a great product at scale. It doesn’t help dull the slow, stabbing pain of selling products into big-box retail or figure out what reverse logistics means. It certainly doesn’t help hardware startups raise the right kind of capital. I hope this series of posts is more helpful than repeating “hardware is hard.”

    I owe this idea to an anonymous attendee of a talk I gave about a year ago in New York. “I’m tired of hearing how ‘expensive’ and ‘slow’ hardware is,” he whined, “what does that actually mean?” He was totally right. So I put together a 110 slide deck of objective numbers aimed at painting a rough, numerical picture of what starting a scalable hardware business looks like. Over the next few weeks, I’ll cover 8 sections in rough chronological order: team, prototyping, financing, manufacturing, logistics, marketing, retail, and exits. This is the first of 4 blog posts to flush out these 110 ‘numbers’.

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  9. Tomi Engdahl says:

    Poetic Process Could Extend the End of Moore’s Law
    5/6/2014 11:15 AM EDT
    http://www.eetimes.com/document.asp?doc_id=1322247&

    A technology in development for more than two decades may have the answer for extending the end of Moore’s law, according to a company coming out of stealth mode.

    POET Technologies derives its name from “Planar Opto-Electronic Technology,” which is its gallium arsenide (GaAs) process used to build electrical, optical, and electro-optical integrated circuits.

    Taylor’s three decades of experience in design and development in electronic and optical device physics, circuit design, and opto-electronic technology, materials, and applications has been critical to the development of the POET platform.

    The full POET process also includes a “Planar Electronic Technology” electrical subset that can support CMOS, Bi-CMOS, and bipolar device fabrication, and offers cheaper, simpler process and fabrication options for applications that don’t require optical.

    Semiconductor performance has historically improved at a logarithmic rate because transistors have shrunk in size, allowing more transistors to be packed into a semiconductor chip, notes Taylor. Moore’s Law established the idea that the number of transistors in a chip doubles every 1.5 to 2 years, thus increasing capabilities of electronic equipment, but the challenge is that as transistors become smaller, the cost of reducing size while increasing speed becomes more expensive, and eventually uneconomical.

    There’s been much discussion about the demise of Moore’s Law. Last year, one expert suggested it would be dead as soon as 2020 at the 7 nm node, while MonolithIC 3D’s Zvi Or-Bach recently wrote that 28 nm is actually the last node of Moore’s Law because, even though it’s possible to make smaller transistors and more of them can be packed into the same-size die, costs can’t continue to be reduced. Last year, Broadcom’s CTO predicted that standard CMOS silicon transistors will stop scaling around 5 nm, and everything will plateau.

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  10. Tomi Engdahl says:

    The benefits of the coupled inductor technology
    http://www.edn.com/design/power-management/4437765/The-benefits-of-the-coupled-inductor-technology-?_mc=NL_EDN_EDT_EDN_today_20141202&cid=NL_EDN_EDT_EDN_today_20141202&elq=070a8b286c914368ae4bb2cd95690776&elqCampaignId=20440

    Coupled inductors are often used in multiphase topologies to take advantage of the current-ripple cancellation from magnetic coupling between the phases. Normally, current-ripple cancellation happens only at the output of the multiphase buck converter when typical discrete inductors are used. When these inductors are magnetically coupled, the current-ripple cancellation is applied to all elements of the circuit: MOSFETs, inductor windings, PCB traces.

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  11. Tomi Engdahl says:

    Conductive Clay: The Future of Energy Storage?
    http://www.eetimes.com/document.asp?doc_id=1324831&

    A new material that behaves like clay could be the future of supercapacitors and batteries that are easy to produce, last longer, and charge faster than what’s currently on the market, Drexel University researchers said.

    Called MXene clay, the material — which is two-dimensional and comprises three layers of titanium and two layers of carbon that’s five atoms thick — was developed by a team of researchers in Drexel’s Department of Materials Science and Engineering led by Distinguished Professor Michel Barsoum.

    Reply
  12. Tomi Engdahl says:

    Understanding SSD over-provisioning
    http://www.edn.com/design/systems-design/4404566/Understanding-SSD-over-provisioning

    The over-provisioning of NAND flash memory in solid state drives (SSDs) and flash memory-based accelerator cards (cache) is a required practice in the storage industry owing to the need for a controller to manage the NAND flash memory. This is true for all segments of the computer industry—from ultrabooks and tablets to enterprise and cloud servers.

    Essentially, over-provisioning allocates a portion of the total flash memory available to the flash storage processor, which it needs to perform various memory management functions. This leaves less usable capacity, of course, but results in superior performance and endurance. More sophisticated applications require more over-provisioning, but the benefits inevitably outweigh the reduction in usable capacity.

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  13. Tomi Engdahl says:

    Ian Sherr / CNET:
    Battery tech stagnant and unlikely to advance for years; manufacturers skirt constraints by improving software, saving energy, and shrinking parts

    It’s 2014. Why is my battery stuck in the ’90s?
    http://www.cnet.com/news/why-batteries-arent-getting-better/

    The devices we all rely on continue to evolve radically. So why has the battery industry failed? Here’s how you can take charge.

    Reply
  14. Tomi Engdahl says:

    GaN Transistors Poised for Revolution
    http://www.eeweb.com/blog/sachin_seth/gan-transistors-poised-for-revolution

    In the power electronics community, compound semiconductors such as gallium nitride (GaN) are drawing more attention as they try to displace silicon based power devices, which have been doing the heavy lifting for the past 30 years or so, and it’s not hard to see why. With an impressively wide band-gap, superior breakdown fields (ten times larger than silicon), and a far superior thermal conductivity than silicon, GaN becomes a logical choice for any high-speed and high-power application.

    Power electronics is a $90 billion-per-year market
    silicon gets to dine at the exclusive power electronics table only because it was able to buy its way there!

    There’s no denying the cost advantages that silicon possesses. The biggest contributing factor behind the higher costs of GaN manufacturing is wafer yields. Silicon manufacturing technology has matured enough to enable mass production of wafers with up to an 18-inch diameter, whereas GaN wafers are still fabricated on 6-inch wafers.

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  15. Tomi Engdahl says:

    Algotronix OTN AES-GCM Cores Are Configurable up to 800 Gbit/s
    http://www.eetimes.com/document.asp?doc_id=1324846&

    The FPGA and ASIC industries rely on third-party intellectual property (IP) vendors to license cores for a whole range of circuit blocks. Design teams license cores because they don’t have the skill set and/or time to develop their own implementations. The cores are typically supplied as netlists with associated testbenches against a fixed design.

    This solution works well for cores like memory controllers or a turbo encoder where the function is well defined, but encryption cores are somewhat special. These cores play a vital part in system security and must not be compromised in any way. Customers want to be certain that the core does exactly what they want and includes nothing else — such as malicious code — but how can designers verify this with a netlist?

    To address this issue, unlike just about every other IP you can license, Algotronix supplies the HDL source code for every licensed core, such as its new OTN AES-GCM core, which is configurable up to 400 Gbit/s. (You can actually go all the way up to 800 Gbit/s if you have access to a next-generation FinFET device.)

    By delivering source code, Algotronix has always given designers the option to implement critical functional blocks in a choice of FPGA resources — such as LUTs or BRAMs — depending on what’s available.

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  16. Tomi Engdahl says:

    eSilicon Offers Try-Before-You-Buy IP Tool
    Online custom IC decision-making portal deputs
    http://www.eetimes.com/document.asp?doc_id=1324850&

    The design service company eSilicon launched IP MarketPlace, a web-based tool for SoC designers, on Wednesday. The tool facilitates browsing IP developed by eSilicon, encouraging designers to tinker, build, and generate a complete memory subsystem before they make a purchase decision.

    The company offered an initial demonstration at the Design Automation Conference in June. As of Wednesday morning, the online site is now officially running. The only missing element is a shopping cart function, which eSilicon promised to enable in its 2.0 release in March.

    IP MarketPlace™ Environment: Try IP Before You Buy
    eSilicon’s newest automated online custom IC decision-making portal
    http://esilicon.com/custom-ip/ip-marketplace

    Reply
  17. Tomi Engdahl says:

    Harvesting Energy for Medical Implants
    http://www.medicaldesignbriefs.com/component/content/article/1104-mdb/news/21085

    Scientists at the VTT Technical Research Centre of Finland have demonstrated a new technique for harvesting energy from mechanical vibrations of the environment and converting it into electricity. They explain that energy harvesters are needed, for example, in wireless self-powered sensors and medical implants, such as pacemakers, where they could ultimately replace batteries.

    Moving these bodies with respect to each other generates energy because of the attractive electrostatic force between their opposite charges. In this research, the energy generated by this motion was converted into electrical power by connecting the bodies to an external circuit.

    Reply
  18. Tomi Engdahl says:

    Demonstrating ASIC IP performance and quality demands an FPGA-neutral design flow
    http://www.edn.com/design/systems-design/4437786/Demonstrating-ASIC-IP-performance-and-quality-demands-an-FPGA-neutral-design-flow

    Companies designing new system-on-chip (SoC) products are subject to ongoing market pressure to do more with less and achieve higher returns. The result is shrinking engineering teams, reduced design tool budgets and shortened time lines to get new products to market. This has led companies designing complex SoCs to move increasingly toward licensing IP cores for a majority of the building blocks of their designs instead of building their own in-house custom versions. Selecting the right IP cores is the fundamental challenge of this developing paradigm — and the means of evaluating and presenting those cores is as important to the purchaser as it is to the developer.

    The reality is that IP cores are offered with a huge variety of features and options. And, even once you’ve sorted through the catalogue of potential vendors and products, there is still a vast range in IP quality. The trick is to separate the truly robust and capable from IP that is buggy, insufficiently tested, and lacking in real world performance with a wide and active set of successful users.

    Reply
  19. Tomi Engdahl says:

    What Are the Differences between Various EM-Simulation Numerical Methods?
    http://mwrf.com/software/what-are-differences-between-various-em-simulation-numerical-methods

    As the complexity of RF/microwave components rises, knowledge of electromagnetic-simulation numerical methods is critical to performing the most efficient and accurate design simulations.

    In a closed-loop mathematical system, it often is impossible to represent the complex geometries and boundary conditions of RF/microwave devices and applications. Due to these devices’ diverse material properties and colliding mechanical-electrical properties, however, there is a growing need to grasp, through simulation, their behavior in their actual environments. Computational electromagnetics (CEM) delves into the array of techniques used to efficiently compute approximations to Maxwell’s equations. In doing so, it enables these complex electrodynamic systems to be modeled. While many numerical methods are known to CEM, this article will delve into the numerical methods that are used most commonly in solutions for EM simulation with the latest technologies.

    Among the methods used for CEM, for example, are integral-equation solvers, differential-equation (DE) solvers, asymptotic techniques, and other numerical methods.

    Reply
  20. Tomi Engdahl says:

    How high-tech, temporary tattoos want to hack your skin
    http://www.dailydot.com/technology/tattoos-wearables/

    When you think of temporary tattoos, you probably picture throwaways pieces of paper with cartoon animals on them. Of the damp washcloths pressed over your arm again and again, trying to make them stick. And then the slow fade while the ink peels off.

    These temporary accessories are full of nostalgia and little else, but a push from technology could make it the latest trend in the wearable market.

    The Center for Wearable Sensors at the University of California San Diego has been experimenting with attaching sensors to temporary tattoos in order to extract data from the body. The tattoos are worn exactly as a regular temporary tattoo would be worn. The sensors simply sit atop the skin without penetrating it and interact with Bluetooth or other wireless devices with a signal in order to send the data.

    “The skin is an important sensory function. The skin is not only our own body, but it could be the body of any host, like a building, a tree, or moving car,” Wang said at the summit.

    But for now, the center is focused on human applications and has gained attention on their work with sweat. A biofuel battery applied as a temporary tattoo converts sweat into energy

    The Center consists of multiple groups working toward the goal of one day commercializing temporary tattoo sensors.

    Critics complain that wearable devices are invasive technologies that haven’t really achieved the adoption rates they need in order to make them a synonymous part of everyday life.

    NewDealDesign presented a similar idea in October when Fast Company asked them what wearables might look like beyond the wrist. The company came up with Project Underskin, a digital tattoo implemented onto a user’s hand. It would interact with everything—trade data with a simple handshake, unlock the door, or track blood sugar levels, the company revealed in its presentation.

    The company, which already saw success with its Fitbit line of fitness trackers, sees the hand as not only a part of the body that would allow for optimal functionality of the tattoo, but a facet of our lives that reveals a lot about ourselves and our culture.

    A company called MC10 seems to be bringing that concept to life. MC10 has been developing attachable computers in the form of small stickers that somewhat resemble a Band-Aid. The company specializes in creating technologies that conform to the human body without compromising function or quality. The company teamed up with researchers at the University of Illinois at Urbana-Champaign to develop the same kind of technologies that the Center for Wearable Sensors has been working on and that NewDealDesigns dreamed up.

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  21. Tomi Engdahl says:

    Qualcomm also the number one in mobile graphics

    Qualcomm is a sovereign leader in mobile application processors, but the company also manages the graphic drawing of mobile devices on the screen. Research by Qualcomm’s share of the market in the third quarter by 42 percent.

    Graphics processors for mobile devices market is currently held by the three companies. Qualcomm (42 per cent), Mediatek (23 per cent), and Apple (13 per cent).

    Samsung’s share of mobile graphics processors is four percent.
    Intel chipsets can be found in three per cent of the equipment.
    Nvidia is only one percent.

    Source: http://www.etn.fi/index.php?option=com_content&view=article&id=2167:qualcomm-ykkonen-myos-mobiiligrafiikassa&catid=13&Itemid=101

    Reply
  22. Tomi Engdahl says:

    Home> Community > Blogs > Tech Edge
    Smart chip mimics human brain functions
    http://www.edn.com/electronics-blogs/tech-edge/4437855/Smart-chip-mimics-human-brain-functions?_mc=NL_EDN_EDT_EDN_funfriday_20141205&cid=NL_EDN_EDT_EDN_funfriday_20141205&elq=6c59a3c0bff0489281252e0e96e6f8f2&elqCampaignId=20540

    HRL Laboratories, based in Malibu, CA, recently tested a prototype neuromorphic chip with 576 silicon neurons aboard a tiny drone measuring 6×6×1.5 inches and weighing 93 grams. The project was funded by the Defense Advanced Research Projects Agency (DARPA).

    The drone, custom built for the test by AeroVironment of Monrovia, CA, flew between three separate rooms. The aircraft was able to process data from its optical, ultrasound, and infrared sensors and recognize when it was in a new or familiar room.

    Tim Simonite, of MIT Technology Review, reports that the first time the drone was flown into each room, “the unique pattern of incoming sensor data from the walls, furniture, and other objects caused a pattern of electrical activity in the neurons that the chip had never experienced before. That triggered it to report that it was in a new space, and also caused the ways its neurons connected to one another to change, in a crude mimic of learning in a real brain. Those changes meant that next time the craft entered the same room, it recognized it and signaled as such.”

    The chip weighs just 18 grams and uses 50 mW of power. Both the drone and chip were developed as part of a DARPA-run project called Systems of Neuromorphic Adaptive Plastic Scalable Electronics (SyNAPSE), a collaborative effort involving HRL Laboratories, Hewlett-Packard, and IBM Research. Its vision is to “develop low-power electronic neuromorphic computers that scale to biological levels.”

    DARPA has invested millions of dollars into the effort and emphasizes size, weight, and power requirements.

    Reply
  23. Tomi Engdahl says:

    Debugging the iPhone 6
    http://www.eetimes.com/author.asp?section_id=36&doc_id=1324889

    Verification consultant Lauro Rizzatti says that if he’s correct in assuming Apple’s using hardware emulation in its verification flow, the iPhone 6 should be completely debugged and working perfectly.

    The Apple technical magic and the tools that enable it are kept cloaked in secrecy. Vendors do not disclose their relationship with Apple. It’s a safe bet, however, that a range of EDA tools following a strict and production-proven methodology and tool flow was employed to design the chips powering the iPhone 6.

    And, why not? Apple’s technical team is among the best there is and should have the best commercially available tools. In that mix has to be hardware emulation, a flexible, versatile, and powerful verification tool that offers an accurate representation of the design before silicon is ready. It is able to uncover well-hidden bugs in complex embedded designs or in the hardware itself. These bugs are the bane of verification engineers, the cause of missed production schedules, and — in some cases — the cause of design respins. This latter case is not an option at Apple, no doubt. Shrinking its product development cycle, not extending it, has to be an objective, especially when the volume is so high.

    The elegance and simplicity of all Apple chip designs suggests that hardware emulation is the foundation for the iPhone 6′s verification strategy, but don’t hold me to my theory. The chip design in the iPhone 6 must have at least 100 million logic gates, a size that would crush an RTL simulator. Hardware emulation can manage designs of several hundred million gates, even one billion gates. It also can process several billions of cycles, as required for booting an operating system or executing application programs, in hours or a day — well ahead of silicon availability.

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  24. Tomi Engdahl says:

    IP is important to protect

    Reverse engineering or reverse engineering is unfortunately quite common nowadays. Designers However, there are ways in which circuits can be hidden secrets very tightly.

    IP security is a big challenge, as each product requires a large amount of research and development and innovation. New products are coming on the market of reverse engineering (reverse engineering) reach – which can significantly affect product sales, if a competitor to copy the design.

    Embedded systems IP-safety comes first to mind the firmware for the microcontroller. Driver into a system designer to end the conversation on the spot. But what about the hardware? Some try to hide its implementation in different ways. None of the embedded system, a simple firmware is not the whole system.

    Embedded system IP security can be broadly divided into two parts:

    - Protection of the firware software an unauthorized access to the
    - Analog and digital resources and the interface between the hide

    When the reverse design is now so common any product success in IP protection functions must be added to the system, so that the IP’s to prevent unauthorized use.

    Source: http://www.etn.fi/index.php?option=com_content&view=article&id=2153

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  25. Tomi Engdahl says:

    Researchers Develop a Way to Control Material with Voltage
    http://www.techbriefs.com/component/content/article/1198-ntb/news/news/21129

    A new way of switching the magnetic properties of a material using just a small applied voltage, developed by researchers at MIT and collaborators elsewhere, could signal the beginning of a new family of materials with a variety of switchable properties. The technique could ultimately be used to control properties other than magnetism, including reflectivity or thermal conductivity. The first application of the new finding is likely to be a new kind of memory chip that requires no power to maintain data once it’s written, drastically lowering its overall power needs. This could be especially useful for mobile devices, where battery life is often a major limitation.

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  26. Tomi Engdahl says:

    Now, a spherical perovskite laser
    http://www.laserfocusworld.com/articles/print/volume-50/issue-12/newsbreaks/now-a-spherical-perovskite-laser.html

    In addition to the numerous functional uses of perovskite as a photovoltaic material, a photodetector, a piezoelectric actuator, a metamaterial lens, an LED, and a vertical-cavity surface-emitting laser (VCSEL), researchers at the University of Toronto (ON, Canada) have demonstrated the first perovskite-based spherical resonator laser by coating organometallic halide perovskites uniformly onto glass microspheres.

    These organometal halide perovskites are an emerging class of semiconductors that have the formula CH3NH3PbX3, where Pb is lead and X can be iodine, bromine, or chlorine (C is carbon and H is hydrogen).

    Reply
  27. Tomi Engdahl says:

    Old laptop batteries could power slums, IBM says
    http://www.bbc.com/news/technology-30345221

    Old laptop batteries still have enough life in them to power homes in slums, researchers have said.

    An IBM study analysed a sample of discarded batteries and found 70% had enough power to keep an LED light on more than four hours a day for a year.

    Researchers said using discarded batteries is cheaper than existing power options, and also helps deal with the mounting e-waste problem.

    The concept was trialled in the Indian city of Bangalore this year.

    The adapted power packs are expected to prove popular with street vendors, who are not on the electric grid, as well as poor families living in slums.

    The IBM team created what they called an UrJar – a device that uses lithium-ion cells from the old batteries to power low-energy DC devices, such as a light.

    The researchers are aiming to help the approximately 400 million people in India who are off grid.

    UrJar: A Lighting Solution using Discarded Laptop Batteries
    http://www.dgp.toronto.edu/~mjain/UrJar-DEV-2014.pdf

    Reply
  28. Tomi Engdahl says:

    Solar sandwich cooks at 40 per cent efficiency
    Boffins claim world record with three-tiered PV rig
    http://www.theregister.co.uk/2014/12/08/unsw_boffins_set_pv_system_record/

    Australian solar trailblazer Professor Martin Green’s group at the University of New South Wales is claiming a world record in solar efficiency, and this time it’s not the usual half-per cent incremental improvement.

    The Australia-US Institute for Advanced Photovoltaics that Green directs says its combination of off-the-shelf solar cells and optical bandpass filters has achieved a conversion efficiency of over 40 per cent.

    Key to the system performance is the use of optical bandpass filters to improve capture and conversion efficiency, along with mirrors to focus the sunlight.

    Professor Green told Vulture South that current “power tower” system efficiency (using sunlight to heat steam for conversion to electricity) is around 22 per cent

    Reply
  29. Tomi Engdahl says:

    Intel to upgrade chip-test plant in China
    Another crack at the mobile market
    http://www.theregister.co.uk/2014/12/08/intel_to_upgrade_chiptest_plant_in_china/

    Chipzilla has decided to take another run at the mobile chip market, announcing plans to spin as much as US$1.6 billion in the direction of its Chengdu plant in China to achieve its aims.

    The money will go towards upgrade a decade-old facility to try to assert its 900-pound-gorilla status in the mobile silicon business, for too long a gap in Intel’s strategy.

    Details of Intel’s intent are fairly sketchy, but the company told China Daily the 2,500-plus employee assembly test site is an important deployment particularly for its “mobility business in the tablet, smartphone, Internet of Things and wearable segments”.

    Reply
  30. Tomi Engdahl says:

    A Faster Way To Make Quantum Computing Chips
    http://spectrum.ieee.org/tech-talk/semiconductors/optoelectronics/a-faster-way-to-make-quantum-computing-chips

    Optics researchers from INRS-EMT in Quebec, Canada have developed a new method of generating photon pairs — tiny entangled particles of light — that are small enough to fit onto a computer chip.

    The new power-efficient approach could enable next-generation quantum computers and optical communication technologies.

    Generating photon pairs on demand is only a recent breakthrough, but it’s important for creating certain computer networks that can process quantum information. Methods of photon polarization — the direction in which an electric field associated with a photon oscillates — thus far only generate photons with same polarization as the laser beam used to pump the device. These states must be mixed afterward to create cross-polarization. The new method shortens the process by directly generating cross-polarized photon pairs, from devices less than one square millimeter in area.

    To generate cross-polarized photons, the research team used two laser beams, one polarized vertically, the other horizontally. A micro-ring resonator (a type of optical cavity that’s anywhere from 10 – 100 micrometers) prevented the two beams’ “classical effects” from destroying the photons’ fragile quantum states, while at the same time amplifying quantum processes.

    Reply
  31. Tomi Engdahl says:

    Choosing Remote-Collaboration Software
    Hardware development requires more than general-purpose tools
    http://spectrum.ieee.org/at-work/innovation/choosing-remotecollaboration-software

    Hardware development, like many engineering projects, is typically a group effort, with contributors increasingly working from home or across multiple buildings, organizations, states, countries, and continents rather than face-to-face. And as a new wave of hardware start-ups are finding out, coordinating those contributors often requires more sophisticated tools than just e-mail and phone calls.

    Reply
  32. Tomi Engdahl says:

    Exclusive NIST Tour Shows Off Quantum Physics’ ARTIQ
    Using FPGAs in science
    http://www.eetimes.com/document.asp?doc_id=1324797&

    The National Institute of Standards and Technology (NIST) continues to create new technologies for quantum computing and bettering direct digital synthesizers (DDS) for many applications including telecommunications technology and standards.

    ARTIQ (Advanced Real-Time Infrastructure for Quantum physics), a new communications protocol being developed by the Ion Storage Group at NIST, is an open-source control system for laser-cooled trapped ion experiments.

    “the main goal is a control system that has both high expressivity (you can describe complex experiments with few lines of code) and high timing performance… it’s a middle ground between running the control algorithms on a PC, which has high level programming language but bad timing performance, and running the control algorithms on a dedicated FPGA design, which has excellent timing performance but is a pain to program.”

    The system features a high-level programming language that helps describe complex experiments, which is compiled and executed on hardware with nanosecond timing resolution and sub-microsecond latency. The system and procedure utilize various hardware technologies and programming languages such as Python, Migen, MiSoC/mor1kx, LLVM and llvmpy.

    Reply
  33. Tomi Engdahl says:

    TSMC to Use EUV for 7nm, Says ASML
    http://www.eetimes.com/document.asp?doc_id=1324906&

    ASML NV, Europe’s largest maker of chip-production equipment, says that Taiwan Semiconductor Manufacturing Co. (TSMC) plans to buy two extreme ultraviolet (EUV) scanners next year to extend the boundaries of its process technology, potentially to 7 nanometers.

    “The EUV scanners are for 10 nanometers,” said ASML executive vice president Frits van Hout in an interview on the sidelines of a TSMC event on Dec. 4. “They’re going to use them to prepare for production in 7 nanometers.”

    The shift toward EUV may signal a switch in the conventional wisdom on the next generation of lithography equipment. The earlier expectation was for chipmakers to use traditional immersion lithography for production of 10 nm chips instead of the long-delayed EUV systems.

    Still, ASML now says the scales may have tipped in favor of EUV technology.

    “It’s a question of when EUV is mature enough to put into production,” van Hout said. “TSMC are the first movers, and I guess everyone will discover that the laws of physics are pretty much the same everywhere in the world and come to similar conclusions when the time is right for them.”

    Intel and TSMC have been injecting money in ASML to push process technology.

    In July 2012, Intel agreed to invest up to $4.1 billion in ASML to speed the adoption of EUV. In August of the same year, TSMC agreed to invest 1.11 billion euros ($1.4 billion) in ASML to secure the latest production knowhow.

    “TSMC is committed to push Moore’s Law as far as we can reach,” Liu said in a speech at the Hsinchu, Taiwan gathering of the world’s major chip-equipment makers. “We need to do early collaboration in equipment development to lower the cost of ownership for 10 nm and beyond.”

    Reply
  34. Tomi Engdahl says:

    Foundry Sales Growing Faster Than Chip Market
    http://www.eetimes.com/document.asp?doc_id=1324902&

    Global foundry IC revenues will grow by 13 percent to $47.9 billion in 2014, following on from annual growth of 13 percent in 2013 and 18 percent in 2012, according to a report produced jointly by the Global Semiconductor Alliance (GSA) and market researcher IC Insights.

    Foundry IC sales are set to grow a further 12 percent to reach $53.7 billion in 2015, according to the two organizations.

    Foundry-made ICs are growing as a percentage of the total market from 21 percent in 2004 to 24 percent in 2009 followed by a marked jump to 37 percent in 2014. This suggests the industry is approaching the steep part of an S-shaped curve of transition as former integrated device manufacturers (IDMs) go fab-lite or fabless. Almost all chip startups join the market as fabless companies. By 2018, foundry-made ICs will represent 46 percent of the industry’s total integrated circuit revenues, GSA and IC Insights assert.

    Reply
  35. Tomi Engdahl says:

    Design 2.0: A New Moore’s Law
    EEs embrace hackathons, accelerators
    http://www.eetimes.com/author.asp?section_id=36&doc_id=1324901&

    Something I am calling Design 2.0 is bubbling up in the engineering community, injecting new energy into the profession. In many ways, it’s the new Moore’s Law.

    Reply
  36. Tomi Engdahl says:

    Potted Battery, Anyone?
    http://www.eetimes.com/author.asp?section_id=36&doc_id=1324899&

    Battery guru Ivan Cowie is faced with a rather difficult task involving potting (encapsulating) a lithium battery such that it can withstand shorting without breaking, exploding, or catching on fire.

    As part of my day job, I was recently tasked with finding a lithium battery cell that could be sealed in a high thermal-conductivity potting (encapsulate) sufficient to withstand the cell’s terminals being shorted without breaking, exploding, catching on fire, etc.

    I have seen a few examples of this for small, implantable medical devices, but now this has to have enough energy to power something like a laptop. Easy, you say? What if the cell is not allowed to have any safety devices inside it — none?

    The shorted-terminal test will also verify that energy was delivered commensurate with an unprotected cell.

    There are several companies with cells that pass IEC 62133, but the cells are in open air. Basically, if the cell has protection, it will be disabled before potting just for the test, while the production versions are allowed to have the extra safety.

    Reply
  37. Tomi Engdahl says:

    Battery technology links at http://www.eetimes.com/author.asp?section_id=36&doc_id=1324899&

    Solving a 49-Year-Old Conundrum
    All About Batteries, Part 1: Introduction
    All About Batteries, Part 2: Specifications & Terminology
    All About Batteries, Part 3: Lead-Acid Batteries
    All About Batteries, Part 4: Alkaline Batteries
    All About Batteries, Part 5: Carbon Zinc Batteries
    All About Batteries, Part 6: Zinc-Air
    All About Batteries, Part 7: Lithium Thionyl Chloride
    All About Batteries, Part 8: Zinc/Silver-Oxide
    All About Batteries, Part 9: Sodium Sulfur (NaS)
    All About Batteries, Part 10: Lithium Sulfur Dioxide (LiSO2)
    All About Batteries, Part 11: Lithium Sulfur (LiS)

    Reply
  38. Tomi Engdahl says:

    7 Recent Medical Device Failures Catching FDA’s Eye
    http://www.eetimes.com/document.asp?doc_id=1324877&

    Reply
  39. Tomi Engdahl says:

    Obscure AC line connectors challenge designers, consumers
    http://www.edn.com/electronics-blogs/power-points/4437858/Obscure-AC-line-connectors-challenge-designers–consumers?_mc=NL_EDN_EDT_EDN_productsandtools_20141208&cid=NL_EDN_EDT_EDN_productsandtools_20141208&elq=ecd75c9da2c343b79ff6ddd1b4fd8745&elqCampaignId=20560

    We’re all familiar with standard AC line plugs and wall sockets – though they may differ country by country, they are fairly well standardized within each, and getting replacement cords and end connectors is not a problem. In addition, engineers and some end users are comfortable with the IEC 320 AC plug/socket, which is used to bring a 120/230-VAC line source to a PC, test instrument, or other chassis; it allows vendors to ship the same physical unit to be used anywhere in the world, just by supplying a line cord with the appropriate wall plug at the end

    But there are many other full-line-voltage AC connectors in use, and they can be difficult to replace if you lose the cord or it is damaged.

    Reply
  40. Tomi Engdahl says:

    Energy-storage capacitors conserve space
    http://www.edn.com/electronics-products/other/4437852/Energy-storage-capacitors-conserve-space?_mc=NL_EDN_EDT_EDN_productsandtools_20141208&cid=NL_EDN_EDT_EDN_productsandtools_20141208&elq=ecd75c9da2c343b79ff6ddd1b4fd8745&elqCampaignId=20560

    Offering designers enhanced charge and discharge performance for energy harvesting and power-line backup applications, the Vishay BCcomponents 196 HVC ENYCAP series of hybrid energy-storage capacitors from Vishay Intertechnology provides energy densities of 9 Ws/g to 13 Ws/g in cases with profiles as low as 2.5 mm. Devices are available in a wide variety of layouts, capacitance values, and voltage ratings.

    The ENYCAP series furnishes up to six cells and capacitance values from 4 F to 90 F in stacked through-hole, surface-mount flat, and lay-flat configurations with pins, tabs, and connectors. Voltage ratings range from 1.4 V to 8.4 V. Capacitors do not require cell balancing and provide soft-charging characteristics of less than 1 A and low leakage current after 24 hours of 0.03 mA to 0.24 mA. The devices also offer a useful life of 1000 hours at +85°C.

    Reply
  41. Tomi Engdahl says:

    Stepper Motor Controller Eliminates Need for Tuning
    http://www.eetimes.com/document.asp?doc_id=1324924&

    Today’s motor controller ICs make it easier to get a motor up and running in a design, but not necessarily running at top performance. Motors come in all sizes and capacities and controllers using generic settings can result in undesirable heating and mechanical noise and, with stepper motors, somewhat jerky motion. To optimize motor performance, the control algorithm must be tuned for the specific motor, operating voltage, and load in use.

    With a properly tuned motor controller, the motor will run with much less noise, less heating, and smoother movement. But tuning requires in-depth understanding of the motor’s physical characteristics as well as the control algorithms

    For stepper motors, one of the key factors to tune is the decay mode, or how the controller circuit handles the current flow when the motor coil gets turned off. Controllers typically use either fast or slow decay modes, each with its own advantages and drawbacks, or a fixed combination of the two.

    The new DRV8846 stepper motor controller family from Texas Instruments, however, has eliminated the need for such tuning. The devices target 12V micro-stepper motors used in applications such as 3D printers, security cameras, appliances, and HVAC systems, and offer a selection of decay modes.

    Reply
  42. Tomi Engdahl says:

    Silicon Startups Get Incubator
    Keysight, Synopsys, TSMC are first partners
    http://www.eetimes.com/document.asp?doc_id=1324919&

    Three semiconductor veterans announced plans for an incubator dedicated to helping chip startups design their first prototypes. Silicon Catalyst aims to provide support for a sector many traditional venture capitalists have fled.

    Keysight, Synopsys, and TSMC have signed exclusive deals to provide tools and services to the incubator. Silicon Catalyst aims to select its first batch of about 10 chip startups before April.

    Reply
  43. Tomi Engdahl says:

    Delay-configurable standard cells with consistent footprints
    http://www.edn.com/design/integrated-circuit-design/4437759/Delay-configurable-standard-cells-with-consistent-footprints?_mc=NL_EDN_EDT_EDN_today_20141210&cid=NL_EDN_EDT_EDN_today_20141210&elq=74338f0c2fb74ad88516d8ddfd90e6bb&elqCampaignId=20600

    The creation of standard cells has been a prime method to achieve desired performance from a technology node. Lots of the innovation that has happened around the cell structures brings stability yet flexibility to their usage in complex ICs. This paper brings yet another such innovative change to standard cell design that will add flexibility in design closure.

    The proposed cell architecture is a modification to existing architecture to provide the same functionality of the cell with delay reconfigurability to achieve different delay requirements without having any change in cell base footprint.

    Reply
  44. Tomi Engdahl says:

    VPX at Light Speed—Optical Brings 100 Gigabits to Backplane Architectures
    http://rtcmagazine.com/articles/view/103150

    A new generation of connectors and interfaces is taking its place in the world of VPX to handle the growing demands of data transfer between cards and systems.

    With the emergence of backplane data communication at PCI Express (PCIe) Gen3 and 10/40 Gigabit Ethernet (GbE) speeds, it’s becoming more and more likely that backplane I/O will require support at similar bandwidths. Certainly chassis-to-chassis connections will need to be accomplished at the same bandwidth, and because copper cables of useful lengths are not practical above 3 Gbit/s, applications will be turning increasingly to optical cables for high-speed external data connections.

    The need for high-speed I/O is not directly related to the communication from slot to slot within a backplane. Also, it is reasonable to point out that individual sensors do not yet have bandwidth requirements in the 8 to 10 Gbit/s range. What will drive the need for optical I/O will be arrays of sensors with local analog to digital conversion. In addition, this need will also be driven by the bandwidth requirements for attached storage and chassis-to-chassis communication.

    VPX is the first embedded backplane architecture specifically designed to allow optical I/O through the backplane. The optical backplane connector is defined within ANSI-VITA 66.0 66.1 and 66.3. The VITA 66 base standard defines a suitable family of optical interconnects for use on VITA 46.0 plug-in modules and backplanes, with VITA 66.1 identifying the mechanical transfer (MT) style contact variant and VITA 66.3, the Mini Expanded Beam contact variant.

    Reply
  45. Tomi Engdahl says:

    VITA 74: Small, Conduction-Cooled, Rugged and Modular
    http://rtcmagazine.com/articles/view/103324

    The VITA 74 standard brings the modularity of the VME and VPX formats to smaller systems that previously would have had to be custom built, saving time and cost.

    Reply
  46. Tomi Engdahl says:

    Trigger and synchronize digitizers to acquire the right data
    http://www.edn.com/design/test-and-measurement/4437894/Trigger-and-synchronize-digitizers-to-acquire-the-right-data?elq=190523212ef04f7c9ea29730d384904d&elqCampaignId=20596

    Triggering is an essential function for any instrument that acquires and digitizes signals. Without the ability to trigger on a specific waveform characteristic, you may never see the point of interest within a digitized waveform. Digitizers can acquire data in several modes. The ring buffer or normal mode behaves just like a digital oscilloscope. Acquired data is loaded into a ring buffer. When the trigger occurs, the data, allowing for post trigger delay, is locked for display and processing. Digitizers also support a streaming acquisition mode where the digitizer captures, digitizes, and continuously stores waveforms. Triggers, therefore don’t indicate the start of a waveform, but rather a point in time where a specific characteristic occurs. In either mode, you can see what happened both before and after the event of interest.

    Digitizers may include powerful trigger AND/OR logic elements that let you combine inputs from multiple sources into a complex multi-element trigger. Such triggers can ensure that the digitizer will only trigger when specifically defined patterns occur. Yet another feature is the ability to cross trigger with other digitizer cards.

    Reply
  47. Tomi Engdahl says:

    Home> Sensors Design Center > How To Article
    Sensor fusion enhances device performance
    http://www.edn.com/design/sensors/4437923/Sensor-fusion-enhances-device-performance?_mc=NL_EDN_EDT_EDN_analog_20141211&cid=NL_EDN_EDT_EDN_analog_20141211&elq=ee3753de13e34f6c9bfd23f7eda6e304&elqCampaignId=20616

    With the ongoing revolution in powerful and intelligent device development such as smart phones, new applications are being enabled at a rapid pace and system development often fails to keep up with new and changing requirements. Today, new applications such as indoor navigation and augmented reality, which make use of motion or positional data, require users to accept a somewhat crude sensor fusion implementations originally developed for simple gaming applications. Now, however, end users easily notice the considerable shortcomings and inaccuracies of the implementations.

    Sensor fusion is a creative engineering technique that combines sensor data from various system sensors to guarantee more accurate, complete and dependable sensor signals or derived sensory information. For sensor fusion to be consistently accurate it is important to have a deep understanding of the strengths and weaknesses of sensors before the engineer can decide how the data from these sensors is best combined.

    Reply
  48. Tomi Engdahl says:

    Smart chip mimics human brain functions
    http://www.edn.com/electronics-blogs/tech-edge/4437855/Smart-chip-mimics-human-brain-functions?_mc=NL_EDN_EDT_EDN_weekly_20141211&cid=NL_EDN_EDT_EDN_weekly_20141211&elq=0d40e9c001d44656979081ab5d51cc5c&elqCampaignId=20632

    HRL Laboratories, based in Malibu, CA, recently tested a prototype neuromorphic chip with 576 silicon neurons aboard a tiny drone measuring 6×6×1.5 inches and weighing 93 grams. The project was funded by the Defense Advanced Research Projects Agency (DARPA).

    The drone, custom built for the test by AeroVironment of Monrovia, CA, flew between three separate rooms. The aircraft was able to process data from its optical, ultrasound, and infrared sensors and recognize when it was in a new or familiar room.

    Reply

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