Want to see analog levels as well as digital for 8 channels, without paying the Rigol overlords?

Have you ever found yourself in the need of a nine channel scope, when all you had was an FPGA evaluation board? Do not despair, [Miguel Angel] has you covered. While trying to make sense of the inner workings of a RAM controller core, he realized that he needed to capture a lot of signals in parallel and whipped up this 9-channel digital oscilloscope.

The scope is remote-controlled via a JavaScript application, and over Ethernet. Graphical output is provided as a VGA signal at full HD, so it is easy to see what is going on. Downloading sampled data to the controlling computer for analysis is in the works. [Miguel] runs his implementation on an Arty A7 development board which is currently available for around a hundred dollars, but the design is transferable to other platforms. The code and some documentation is available on GitHub

ScopeIO
Embedded Measurement System for FPGA
https://hackaday.io/project/98429-scopeio

BeagleLogic, now as a turnkey and standalone 16-channel Logic Analyzer

Three years ago, the BeagleLogic project showed how to use a BeagleBone as a 100MSa/s, 14-channel logic analyzer.

BeagleLogic Standalone is the next step in the evolution of BeagleLogic from just an add-on to the BeagleBone to a standalone logic analyzer in itself. It is based on the OSD3358 System-In-Package (SiP) from Octavo Systems and increases the specifications to 16-channels @100MSa/s and adds Gigabit Ethernet vs. 100Mbps on the BeagleBone(s).

BeagleLogic standalone is alive and booting! Check out the project logs for more information

Three years ago, the BeagleLogic project showed how to use a BeagleBone as a 100MSa/s, 14-channel logic analyzer.

BeagleLogic Standalone is the next step in the evolution of BeagleLogic from just an add-on to the BeagleBone to a standalone logic analyzer in itself. It is based on the OSD3358 System-In-Package (SiP) from Octavo Systems and increases the specifications to 16-channels @100MSa/s and adds Gigabit Ethernet vs. 100Mbps on the BeagleBone(s).

A few years ago, [Kumar] created the BeagleLogic, a 14-channel, 100 MSPS logic analyzer for the BeagleBone as an entry for the Hackaday Prize. This is a fantastic tool that takes advantage of the PRUs in the BeagleBone to give anyone with a BeagleBone a very capable logic analyzer for not much cash.

This year, [Kumar] is back at it again. He’s improving the BeagleLogic with a BeagleBone on a chip. This is the BeagleLogic Standalone, a 16-channel logic analyzer at 100 MSPS using a single chip.

Three years ago, the BeagleLogic project showed how to use a BeagleBone as a 100Msps, 14-channel logic analyzer.

Based on the Octavo Systems’ OSD3358 SIP [BeagleBone on a chip], this is the next step in the evolution of the BeagleLogic project from just an add-on to the BeagleBone to a standalone logic analyzer in itself.

BeagleLogic is not just the hardware, but the software as well. It will feature a new web-based frontend. I am actively learning React and web technologies to be able to build this.

The Internet is full of low-speed logic analyzer designs that use a CPU. There are also quite a few FPGA-based designs. Both have advantages and disadvantages. FPGAs are fast and can handle lots of data at once. But CPUs often have more memory and it is simpler to perform I/O back to, say, a host computer. [Mohammad] sidestepped the choice. He built a logic analyzer that resides partly on an FPGA and partly on an ARM processor.

In fact, his rationale was to replace built-in FPGA logic analyzers like Chipscope and SignalTap. These are made to coexist with your FPGA design, but [Mohammad] found they had limitations. They also eat up die space you might want for your own design, so by necessity, they probably don’t have much memory.

Logic Analyzer
HPS-powered Logic Analyzer debugging FPGA
http://people.ece.cornell.edu/land/courses/ece5760/FinalProjects/s2017/md874/md874/LogicAnalyzer.htm

On my way to this year’s Hackaday SuperConference I saw an article on EE Times about someone taking the $22 Lattice iCEstick and turning it into a logic analyzer complete with a Python app to display the waveforms. This jumped out as pretty cool to me given that there really isn’t a ton of RAM on the stick, basically none that isn’t contained in the FPGA itself.

[Jenny List] has also written about the this application as created by [Kevin Hubbard] of Black Mesa Labs and [Al Williams] has a great set of posts about using this same $22 evaluation board doing ground up Verilog design using open source tools. Even if you don’t end up using the stick as a logic analyzer over the long haul, it’ll be very easy to find many other projects where you can recompile to invent a new purpose for it.

SUMP2

[Kevin] refers to his design as SUMP2 and for good reason as there is some departure from the original SUMP architecture. The SUMP2 utilizes a simple lossless compression scheme called Run Length Encoding (RLE) where instead of sending a large number of 0’s or 1’s in a row, it sends a bit value and how many times to repeat that value before the next transition to a different bit state.

An Open Source 96 MSPS Logic Analyzer For $22
http://hackaday.com/2016/10/26/an-open-source-96-msps-logic-analyzer-for-22/