- General information
- Random access memory
- Non-volatile memory
- Special memory types
- Memory interfacing techniques
Memory technology information page
- How Computer Memory Works Rate this link
- DRAM Pricing: The Fix Is - DRAM prices are a key driver of PC-related and semiconductor stocks. Price manipulation by manufacturers of PC memory components such as double data rate (DDR) DRAM is deliberate, periodic, predictable, and has been happening for decades. Rate this link
Random access memory (RAM) is the best known form of computer memory. RAM is considered "random access" because you can access any memory cell directly if you know the row and column that intersect at that cell. RAM data, on the other hand, can be accessed in any order.
RAM memory consists of meory cells. Each memory cell represents a single bit of data (logic 1 or logic 0). Memory cells are etched onto a silicon wafer in an array of columns (bitlines) and rows (wordlines). The intersection of a bitline and wordline constitutes the address of the memory cell.
RAM memory is available in many physical forms. Memory chips in desktop computers originally used a pin configuration called dual inline package (DIP). This arrangement was later replace with memry modules, that consist of memory chips, along with all of the support components, on a separate printed circuit board (PCB) that could then be plugged into a special connector (memory bank) on the motherboard. The type of board and connector used for RAM in desktop computers has evolved over the past years. First there were proprietary memory modules, then came SIMMs (single in-line memory module). There has been two different SIMM types widely in use: 30-pin connector version (8 bit bus version) and 72-pin connector version (wider bus, more address lines). As processors grew in speed and bandwidth capability, the industry adopted a new standard in dual in-line memory module (DIMM). Many brands of notebook computers use small outline dual in-line memory module (SODIMM).
Memory chips are normally nowadays only available to general public in a form of a card called a module.
Most memory available today is highly reliable. Most systems simply have the memory controller check for errors at start-up and rely on that. Memory chips with built-in error-checking typically use a method known as parity to check for errors. Parity chips have an extra bit for every 8 bits of data. The way parity works is simple. Let's look at even parity first. Computers in critical positions need a higher level of fault tolerance. High-end servers often have a form of error-checking known as error-correction code (ECC). The majority of computers sold today use nonparity memory chips. These chips do not provide any type of built-in error checking, but instead rely on the memory controller for error detection.
General information on RAM
- FPM DRAM: Fast page mode dynamic random access memory was the original form of DRAM. It waits through the entire process of locating a bit of data by column and row and then reading the bit before it starts on the next bit.
- EDO DRAM: Extended data-out dynamic random access memory does not wait for all of the processing of the first bit before continuing to the next one. As soon as the address of the first bit is located, EDO DRAM begins looking for the next bit. It is about five percent faster than FPM.
- SDRAM: Synchronous dynamic random access memory takes advantage of the burst mode concept to greatly improve performance. It does this by staying on the row containing the requested bit and moving rapidly through the columns, reading each bit as it goes. The idea is that most of the time the data needed by the CPU will be in sequence. SDRAM is about five percent faster than EDO RAM and is the most common form in desktops today.
- DDR SDRAM: Double data rate synchronous dynamic RAM is just like SDRAM except that is has higher bandwidth, meaning greater speed.
- RDRAM: Rambus dynamic random access memory is a radical departure from the previous DRAM architecture (designed by Rambus). It uses a special high-speed data bus called the Rambus channel. RDRAM memory chips work in parallel to achieve high data rates.
- EDRAM: Enhanced DRAM (EDRAM) is the combination of SRAM and DRAM in a single package that is usually used for a level-2 cache. Data is read first from the faster (typically 15 nanoseconds) SRAM and if it is not found there, it is read from the DRAM, typically at 35 nanoseconds. By switching from FPM to EDO, one can expect a performance improvement of 2 to 5 percent.
- ECC RAM: ECC RAM is a special error correcting RAM type. It is especially used in servers where data verification is essential. This type of RAM was never widely adopted by PC users due to its high cost and lower performance than many other popular DRAM types.
- BEDO RAM: Burst Extended Data Output DRAM is EDO RAM with extended burst mode capabilities.
- JEDEC SDRAM: JEDEC (Joint Electron Device Engineering Council) SDRAM is an industry standard synchronous DRAM. It has a dual-bank architecture and several burst mode accesses that can be preset. JEDEC SDRAM chips operate at either 83 MHz or 100 MHz. JEDEC SDRAM is also known as PC66 SDRAM because it was originally rated for 66 MHz bus operation and to distinguish it from Intel's PC100 architecture.
- PC100 SDRAM: PC100 SDRAM is SDRAM that states that it meets the PC100 specification from Intel. Intel created the specification to enable RAM manufacturers to make chips that would work with Intel's i440BX processor chipset. The i440BX was designed to achieve a 100 MHz system bus speed.
- PC133 SDRAM: PC133 SDRAM has the same basic architecture as the PC100 SDRAM with the added ability to support a 133MHz bus speed.
- ESDRAM: Enhanced SDRAM (ESDRAM), made by Enhanced Memory Systems, is a new JEDEC standard type of DRAM, which attempts to improve performance not by decreasing latency or increasing bus speed, but by improving the internal function of the RAM. The goal of ESDRAM is to obtain greater throughput by removing some of the internal delays of the standard SDRAM architecture. This is done by adding a row register cache (RRC) which immediately absorbs the data from the Sense amps, freeing them to refresh the DRAM cell in parallel with the data release to the cache lines as opposed to in serial as it is usually done.
- Enhanced DDRRAM: Enhanced DRRRAM, or EDDR uses a concept similar to that of ESDRAM to improve latency and power consumption when compared to a standard DDRRAM module.
- SLDRAM: SyncLink DRAM (SLDRAM) is a new standard for SDRAM is being developed by the SCIzzL Association at Santa Clara University (California) along with many industry leaders. This technology improves on SDRAM by offering a higher bus speed and by using packets (small packs of data) to take care of address requests, timing, and commands to the DRAM.
- VCRAM: Virtual Channel RAM (VCRAM) architecture is designed for multithreading in mind. VCRAM provides each thread with its own Virtual Channel: basically a dedicated port to RAM which allows each thread to access its own virtual memory space as if it were the only thread accessing the RAM bank, with up to 16 channels available.
- CDRAM: Cached DRAM (CDRAM) architecture incorporates an SRAM cache with DRAM. The separate terminals of the two RAM types allow independent control of each. This type of DRAM has been useful in graphics applications and PDAs. It also can be used as cache and main memory.
- RLDRAM: Reduced Laterncy DRAM is low latency DRAM technology developed for high-performance networking applications. This memory technology is developed by Infineon and Micron.
- FCRAM: FCRAM is a special memory architecture looking to transplant CAMs and SRAMs in datapath memory designs. The FCRAM departs from standard DDR DRAMs in several areas from architecture to the core design. The FCRAM architecture is fully pipelined and tightly coupled. It includes special features that are not found in standard DDR DRAMs, such as row access (RAS) and column access (CAS) control and an internal auto pre-charge cycle.
Dynamic RAM (DRAM)
Dynamic random access memory (DRAM) is the most commonly used computer memory type. In DRAM a transistor and a capacitor are paired to create a memory cell. Each memory cell represents a single bit of data. The capacitor holds the bit of information (a 0 or a 1) as the voltage to chaged to it. The transistor acts as a switch that lets the control circuitry on the memory chip read the capacitor or change its state.
A capacitor is like a small bucket that is able to store electrons. To store a 1 in the memory cell, the bucket is filled with electrons. To store a 0, it is emptied. he problem with the capacitor's bucket is that it has a leak (usually in few milliseconds a full bucket becomes empty).
Therefore, for dynamic memory to work, either the CPU or the memory controller has to come along and recharge all of the capacitors holding a logic 1 state voltage level before they discharge. To do this, the memory controller reads the memory and then writes it right back. This refresh operation typically happens automatically thousands of times per second.
DRAM works by sending a charge through the appropriate column (CAS) to activate the transistor at each bit in the column. When writing, the row lines contain the state the capacitor should take on. When reading, the sense-amplifier determines the level of charge in the capacitor. If it is more than 50 percent, it reads it as a 1; otherwise it reads it as a 0. The counter tracks the refresh sequence based on which rows have been accessed in what order. The length of time necessary to do is expressed in nanoseconds (billionths of a second). A memory chip rating of 70ns means that it takes 70 nanoseconds to completely read and recharge each cell.
The amount of time that RAM takes to write data or to read it once the request has been received from the processor is called the access time. Typical access times vary from 9 nanoseconds to 70 nanoseconds, depending on the kind of RAM. Although fewer nanoseconds access is better, user-perceived performance is based on coordinating access times with the computer's clock cycles. Access time consists of latency and transfer time. Latency is the time to coordinate signal timing and refresh data after reading it.
Typical DRAM memory access procedure is the following: To read a memory cell, we place a row address on the address bus lines (all the address lines together are called an address bus) and activate the Row Access Select (RAS) line and wait for 15ns while the holding circuitry to latches the Row address. Then we place column address on the address bus and activate the Column Access Select (CAS) line. Now, we have to wait for the level checking circuitry to determine if the location contains a 0 or 1. This information or data will appear as a high or low voltage on the data output pin.
There are nowadays many variations of DRAM memory. Here is a lost of some most common ones:
Dynamic RAM is typically inexpensive but not very fast.
- ASRAM: Async SRAM has been with us since the days of the 386, and is still in place in the L2 cache of many PCs. It's called asynchronous because it's not in sync with the system clock, and therefore the CPU must wait for data requested from the L2 cache. However, the wait isn't as long as it is with DRAM.
- BSRAM: Burst SRAM (also known as SynchBurst SRAM) is synchronized with the system clock or, in some cases, the cache bus clock. This allows it be more easily synchronized with any device that accesses it and reduces access waiting time. It is used as the external level-2 cache memory for the Pentium II microprocessor chipset.
- PB SRAM: Using burst technology, SRAM requests can be pipelined, or collected so that requests within the burst are executed on a nearly instantaneous basis. PB SRAM uses pipelining, and while it's slightly behind system synchronization speeds, it's a possible improvement over Sync SRAM because it's designed to work well with bus speeds of 75 MHz and higher.
Static RAM (SRAM)
SRAM consists of memory cells. Each memory cell represents a single bit of data. In static RAM, a form of flip-flop holds each bit of memory. This kind of flip-flop will hold it's state as long as it gets power or the state is changed with a write signal to that memory cell. Flip-flop for a memory cell takes four or six transistors along with some wiring, which is much more than what is needed by DRAM. Therefore, you get less memory per chip, and that makes static RAM a lot more expensive.
There are many variations of SRAM in use. Here are some variations used inside computers:
Static RAM typically is fast and expensive. So static RAM is typically used to create the CPU's speed-sensitive cache.
In addition SRAM is sometimes used to store data "semi permanently", so that when system is not powered up, the data in SRAM chip is retained with a help of a small backup battery that provides operating power to memory when rest of the system is not operating (there are special SRAM ICs that consume very little power when they are not accessed, so they are suitable for battery backed up application).
Pseudo-static RAM (PSRAM)
Pseudo-static RAM (also known as Pseudo SRAM) is RAM memory that look like static RAM to the system that uses it, but is implemented inside using some different memoty technique than static RAM. Typical way to implement pseudo-static RAM is to impelement the memory inside IC as DRAM and then build the memory refreshing electronics inside the same chip (it refreshes the contents of DRAM invisibily to other system).
- VRAM: VRAM is dual-ported memory; there are two access ports to the memory cells, with one used to constantly refresh the display and the other used to change the data that will be displayed.
- MPDRAM: Multiport dynamic random access memory (MPDRAM) is a type of RAM used specifically for video adapters or 3-D accelerators. The "multiport" part comes from the fact that MPDRAM normally has both random access memory and serial access memory capabilities. MPDRAM is located on the graphics card and comes in a variety of formats, many of which are proprietary.
- Window RAM: Window RAM (WRAM), unrelated to Microsoft Windows, is very high-performance video RAM that is dual-ported and has about 25% more bandwidth than VRAM, but costs less. Additional graphics features include a double-buffering data system several times faster than VRAM's buffer, resulting in considerably faster screen refresh rates.
- SGRAM: Synchronous Graphics RAM a single-ported RAM type. It speeds performance through a dual-bank feature, in which two memory pages can be opened simultaneously; it therefore approximates dual-porting. SGRAM is proving to be a significant player in 3-D video technology because of a block-write feature that speeds up screen fills and allows fast memory clearing.
- 3D-RAM: 3D-RAM is a special memory chip that is optimized for high performance graphics systems. It stores 3 dimensional data and uses Z-compare and alpha blend units. 3D-RAM is specifically designed for 3D grpahics card applications in mind. This type of RAM is not as effective for non-graphics intensive systems.
- MDRAM: Multibank Dynamic RAM is a high-performance RAM, developed by MoSys. It divides memory into multiple 32 KB parts or "banks" that can be accessed individually.Having individual memory banks allows accesses to be interleaved concurrently, increasing overall performance. MDRAM cards can be manufactured with just the right amount of RAM for a given resolution capability (no need to be multiples of megabytes).
Video RAM as "video RAM" means in general all forms of RAM used to store image data for the video display monitor. Somewhat confusingly, the most common type of video RAM is called Video RAM (VRAM). All types of video RAM are special arrangements of dynamic RAM (DRAM).
Reduced Laterncy DRAM (RLDRAM) is low latency DRAM technology developed for high-performance networking applications. This memory technology is developed by Infineon and Micron.
Reduced latency DRAM (RLDRAM.) memory is a new type of high-performance memory. It combines the performance-critical features that networking and cache applications need--such as high density (256Mb), high bandwidth (2.4 GB/s), and fast SRAM-like random access.
RLDRAM architecture is designed to reduce cost and, in turn displace CAMs and SRAMs in networking designs. RLDRAM is an advanced DRAM architecture that was specifically designed to have low latency because of its fast speed and row-cycle access times. While typical commodity DRAM architectures have four banks, the RLDRAM has eight banks. This allows for shorter column/row address and data bit lines, resulting in a faster access time. The round-robin operation with those eight banks is the main principle behind the reduced latency of RLDRAM.
CMOS RAM is a term for the small amount of memory used by PC computers and some other devices to remember things like hard disk settings. This memory uses a small battery to provide it with the power it needs to maintain the memory
contents. So CMOS RAM is just a form of battery backed SRAM or similar memory.
Nonvolatile RAM (NVRAM) is a special kind of RAM that retains data when the computer is turned off or there is a power failure. NCRAM is powered by a battery within the computer. It can also work by writing its contents to and restoring them from an EEPROM.
NVRAM is typically implemented so that the chip has same amount of RAM and some non-volatile memory in it. In normal operation, all reads and writes access the RAM part of the chip. When normal operation power is lost, the chip autiomatically copies the contents of the RAM to the non-volatile memory. Then the system is again powered up, the contents of the non-volatile memory are copied back to RAM memory side for normal system operation. The non-volatile memory can be for example EEPROM.
In Multilevel DRAM (MLDRAM), data is stored in cells that contain multiple bits (many charge voltage levels in use instead of two).
This is still an experimental architecture. Currently several two-bit-per-cell methods have been proposed.
Non-volatile memory will keep is't contenst even when it is powered down.
Read-only memory (ROM) is an integrated circuit programmed with specific data when it is manufactured.
ROM chips contain a grid of columns and rows. ut where the columns and rows intersect, there is a diode to connect the lines if the value is 1. If the value is 0, then the lines are not connected at all.
Programmable Read-only memory (PROM) is an integrated non-volatile memoroy circuit that is manufactured to be empty. It can be later programmed with specific data. The programming can be done only once. After programming this data is always stored to this IC. Blank PROM chips can be bought inexpensively and coded by anyone with a special tool called a programmer.
PROM chips have a grid of columns and rows just as ordinary ROMs do. The difference is that every intersection of a column and row in a PROM chip has a fuse connecting them. A charge sent through a column will pass through the fuse in a cell to a grounded row indicating a value of 1. Since all the cells have a fuse, the initial (blank) state of a PROM chip is all 1s. To change the value of a cell to 0, you use a programmer to send a specific amount of current to the cell. The higher voltage breaks the connection between the column and row by burning out the fuse. This process is known as burning the PROM.
Erasable programmable read-only memory (EPROM) chips work PROM chips, but they can be rewritten many times.
EPROM is constructed to have a grid of columns and rows. In an EPROM, the cell at each intersection has two transistors. The two transistors are separated from each other by a thin oxide layer. One of the transistors is known as the floating gate and the other as the control gate. The floating gate's only link to the row (wordline) is through the control gate. As long as this link is in place, the cell has a value of 1. To change the value to 0 requires altering the placement of electrons in the floating gate. An electrical charge, usually 10 to 13 volts, is applied to the floating gate to charge the floating gate and thus turn bit to 0.
A blank EPROM has all of the gates fully open, giving each cell a value of 1. Programming can change wanted cells to 0. To rewrite an EPROM, you must erase it first. Erasing an EPROM requires a special tool that emits a certain frequency of ultraviolet (UV) light (253.7 nm wavelength). An EPROM eraser is not selective, it will erase the entire EPROM. Erasing EPROM typically takes several minutes (be careful on erasing time, because over-erasing can damaghe the IC). EPROMs are configured using an EPROM programmer that provides voltage at specified levels depending on the type of EPROM used.
Electrically erasable programmable read-only memory (EEPROM) chips that can be electrically programmed and erased. EEPROMs are typically changed 1 byte at time. Erasing EEPROM takes typically quite long.
The drawback of EEPROM is their speed. EEPROM chips are too slow to use in many products that make quick changes to the data stored on the chip.
Typically EEPROMs are found in electronics devices for storing the small amounts of non-volatile data in applications where speed is not the most importants. Small EEPROMs with serial interfaces are commonly found in many electronics devices.
Flash memory is a type of EEPROM that uses in-circuit wiring to erase by applying an electrical field to the entire chip or to predetermined sections of the chip called blocks.
Flash memory works much faster than traditional EEPROMs because it writes data in chunks, usually 512 bytes in size, instead of 1 byte at a time.
Flash memory has many applications. PC BIOS chip might be the most common form of Flash memory. Removable solid-state storage devices are becoming increasingly popular. SmartMedia and CompactFlash cards are both well-known, especially as "electronic film" for digital cameras. Other removable Flash memory products include Sony's Memory Stick, PCMCIA memory cards, and memory cards for video game systems.
Ferroelectric Random Access Memory (FRAM, FeRAM) is a type of non-volatile read/write random accesses semiconductor memory. FRAM combines the advantages of SRAM - writing is roughly as fast as reading (70-200 ns), and EPROM non-volatility and in-circuit programmability.
A ferroelectric memory cell consists of a ferroelectric capacitor and a (metal oxide semiconductor) MOS transistor. Its construction is similar to the storage cell of a DRAM. The difference is in the dielectric properties of the material between the capacitor???s electrodes. This material has a high dielectric constant and can be polarized by an electric field. The polarization remains until an opposite electrical field reverses it. This makes the memory non-volatile.
FRAM has similar applications to EEPROM, but can be written much faster.
Current FRAM disadvantages are high cost and low density, but that may change in the future.
Battery backed SRAM
Battery packed SRAM is just a combination of small battery and SRAM IC. The small battery powers the SRAM chip when the rest of the system is powered down.
Serial access memory (SAM)
The opposite of RAM is serial access memory (SAM). SAM stores data as a series of memory cells that can only be accessed sequentially (like a cassette tape). If the data is not in the current location, each memory cell is checked until the needed data is found. SAM works very well for memory buffers, where the data is normally stored in the order in which it will be used.
A FIFO (First In First Out) is a type of buffer, where the first byte to arrive is the first to leave. FIFO is typically used for data buffering in various computer and communication interfacing applications.
FIFO's can be put into two categories: synchronous and asynchronous. A synchronous FIFO has a single clock that governs both reads and writes, while an asynchronous FIFO has separate clocks for the read and write ports.
Synchronous FIFO's are nice an simple. nd because of the nature of having a single clock, it is fairly simple for these FIFO's to keep an accurate count of what's in the FIFO.
Async FIFO's have a difficult time keeping track of how many elements are in the FIFO at any particular moment. That's why many async FIFO implementations use a strange system of flags to indicate the fullness or emptiness of the FIFO.
FIFOs are typically reduce the chances of data loss in data communications by 'buffering' the data. This way the device driver can then read all of the data from the FIFO in one go, whilst communication is still continuing filling more data to the FIFO. This is how a FIFO is most often used. This works also in sending data out. Systems that use FIFO typically use a trigger level to determine at what point (how full) the buffer should be emptied by the driver; or in the analogy how full do you let the box get before taking it to the lorry.
- Using Content-Addressable Memory for Networking Applications - Content-addressable memory (CAM) turns the tables on conventional memory approaches. CAMis tailor-made for accelerating searches through massive data tables, making it a prime candidate for such things as routing tables and policy. Rate this link
- Content addressable memory definition Rate this link
Content addressable memory (CAM)
Content addressable memory (CAM) is a special memory that is very different from a normal random access memory. In random acdess memory data can only be accessed by it's memory address.
CAM is a special kind of storage device which includes comparison logic with each bit of storage. . A data value is broadcast to all words of storage and compared with the values there. Words which match are flagged in some way. Subsequent operations can then work on flagged words, e.g. read them out one at a time or write to certain bit positions in all of them. A CAM can thus operate as a data parallel (SIMD) processor.
CAMs are often used in caches and memory management units.
CAMs have also found their applications in high-end data communication devices like data switches and routers. Typical applications on this field are Virtual Path Identifier/Virtual Circuit Identifier (VPI/VCI) translation in ATM switches up to OC12 (622 Mbps) data rates and Media Access Control (MAC) address lookup in Ethernet/Fast Ethernet bridges.
Credit Card Memory
Credit card memory is a proprietary self-contained DRAM memory module that plugs into a special slot for use in notebook computers. For example some Toshiba latops and IBM Thinkpad models support this memory type. Typical Credit Card Memory devices are flash memorues with capacity from 8MB to 32 MB.
- An Introduction to PCMCIA and PC Card Technology Rate this link
- PCMCIA Home Page - PCMCIA and PC-CARD technology Rate this link
- PCMCIA card pinout Rate this link
- Using CF/PCMCIA cards on the IDE interface - This document outlines how to use CF/PCMCIA storage cards on a IDE interface. This is achieved by using a PCB (design not included), a MALE CF or PCMCIA connector to connect to the memory card, a male 40 pin IDE connector (to connect to the hd-cable) and a male 4 pin HD-power connector. The convertor will only work with CF/PCMCIA hard-disk-like storage devices. Rate this link
PCMCIA Memory Card
PCMCIA Memory Card is a self-contained DRAM module for notebooks. This memory cars type is standardized and should work with any notebook computer whose system bus matches the memory card's configuration.
PCMCIA card standard started from simple memory cards. The original PCMCIA interface is quite similar to ISA bus (a subset of ISA features impelemnted somewhat differently). PCMCIA uses 68-pin connector.
The newly adopted 60-pin memory card standard. Miniature Card was designed for low cost consumer needs. It is architected for a Linear Flash interface. Using Miniature Card requires no ASICs, Microcontrollers, or hardware overhead. The low-cost connector reduces host and card cost by requiring no connector on the card and no ejection mechanism on the host.
SmartMedia is about one-third the area of a conventional PC Card and only 0.76mm in thickness. This new storage card is expected to help electronic devices - including the digital still camera and various forms of portable information equipment - become even smaller in size. SmartMedia is also known as SSFDC.
CompactFlash is a very small removable mass storage device first introduced in 1994 by SanDisk Corporation. They provide complete PCMCIA-ATA functionality and compatibility pluse TrueIDE functionality compatible with ATA/ATAPI-4. At 43mm (1.7") x 36mm (1.4") x 3.3mm (0.13"), the device's thickness is less than one-half of a current PCMCIA Type II card. Compared to a 68-pin PCMCIA card, a CF card has 50 pins but still conforms to PCMCIA ATA specs. It can be easily slipped into a passive 68-pin Type II adapter card that fully meets PCMCIA electrical and mechanical interface specifications. Conforming to PCMCIA ATA specification means that Compact Flash card behaves exacly like an IDE disk, so there is no need for any special drivers to use it (normal PC operating systems always support IDE drives). So it just looks like a small IDE hard disk, but internally uses flash memory as storage media. You can even buy wiring adapters allowing you to attach a CF to a normal, 40-pin flat ribbon cable connector like any IDE disk.
Besides memory cards this card format is also used for some extension cards like modems. CompactFlash is widely used in digital cameras, PDA devices and in embedded PC systems. There are also intrfaces available to interface CompactFlash card to PCMCIA interface.
The Memory Stick digital data storage is designed to become a standard storage and transfer media. It is smaller than a stick of chewing gum. . It is available in 4MB, 8MB, 16MB, 32MB, 64MB, and 128MB storage sizes and as a kit with a PC card adapter. Due to its compact design, it is best suited for use in small digital electronics products. It is highly reliable with a 10-pin connector, and an Erasure Prevention Switch that when set on "Lock" virtually eliminates the risk of accidentally erasing or recording over stored data. The memory is accessed using a special serial protocol (designed to be compatible with future models also). Memory Stick works in most new DV & Mini DV camcorders and digital cameras. The maximum read rate of Memory Stick is 2.45MB/second and write rate is 1.5MB/second.
There has been recently relesed a new MemoryStick version called "MemoryStick Pro". This new version is same size as original one. The new version is colored to have gold color is case. This Pro version promises more capacity (up to 1 gigabyte) and more speed (enough for DVD video). This Pro version is going to be available at summer 2003.
MultiMediaCard is a new very small thin flash card, sized from 2MByte to 16MByte, used in some mobile phones, and HPCs. As it is new into the market, whether will become commodity is unknown. This is a Flash card with a 7 contact interface that can be both MMcard bus, and SPI bus. MultiMediaCard products are currently only made by Sandisk.
- Matsushita Electric, Sandisk and Toshiba agree to join forces to develop and promote next generation secure memory card Inital press release (from 1999) telling that those companies have reached an agreement on comprehensive collaboration to jointly develop, specify and widely promote a next generation secure memory card. Rate this link
- SD Card Association Rate this link
- Secure Digital ready to make mark on flash Rate this link
Secure Digital (SD)
The SD (Secure Digital) Memory Card is a non-volatile memory device about the size of a postage stamp. SD cards are solid-state devices that provide quite large storage capacity (32 MB & 64 MB in 2000, with the promise of up to 128 MB and 256 MB). SD cards are designed to hhave great flexibility and some security functions built in. Secure Digital was introduced by Toshiba at year 2000. It was co-developed with SanDisk and Toshiba. SD will facilitate fast, simple, secure downloading of all types of digital files, like music, movies, photos, news etc. It is used to store data on portable devices, such as MP3 players, digital cameras, handheld computers and cell phones. In addition to memory, Secure Digital can also allow devices to add technologies, such as Bluetooth wireless connectivity or global positioning system (GPS).
Secure Digital includes software that complies with Secure Digital Music Initiative standards protecting against unauthorized replication of copyrighted content. As a result, digital-audio files downloaded from music services, such as Napster, cannot be played on devices that use Secure Digital cards.
Interfacing dynamic memories to microprocessors can be a demanding process. Getting DRAMs to work in your prototype board can be even tougher. Here are few documents which may be of some help when planning to do memory interfacing.
- Design and PCB Layout Considerations for Dynamic Memories interfaced to the Z80 CPU by Tim Olmstead - Book in pdf format. Rate this link
- How sychronous memory (SDRAM) will impact top-level IS planning - white paper Rate this link
- Banish bad memories - Numerous factors - some of which you can influence and others beyond your control - collaborate to create memory-subsystem errors. Designing and testing with these factors in mind, though, can curtail their effects at the system level. Rate this link
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- PC Hardware Rate this link
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- Computer hardware interfacing projects page Rate this link
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