Chip Market Brightens in 2017. The semiconductor industry may yet have been flat in 2016, but expects it is expected that the electronics industry rebounds in 2017, probably in the first half. Wall Streeter predicts return to 5% growth. Total IC business growth is expected to be around five percents for few years to come.There seems to several promises to this direction, especially in memory business. Chips Execs See Maturing Industry article says that pessimism about immediate revenue and R&D growth is a sign of a maturing industry.
Thanks to both rising prices and volume sales, the memory sector is expected to lead overall semiconductor sales growth. Sales of memory chips will increase 10% next year to a new record high of $85.3 billion, according to the latest report from IC Insights. NAND flash will grow almost as fast at 10% next year. The average annual growth rate for the memory market is forecast to be 7.3% from 2016-2021. Every year we need 5.6% more bits than previous year, and the unit prices are increasing on both DRAM and Flash.
There will be also other growth sectors. The data center will be the fastest growth segment next year, rising 10%, followed by automotive at 9% and communications at 7%. Consumer and industrial markets growing at about 4% in line with the overall industry. PCs will be the big drag on 2017, declining 2%.
China Dominates Planned Chip Fabs as more than 40% of front end semiconductor fabs scheduled to begin operation between 2017 and 2020 are in China, a clear indication that China’s long-stated ambition to build a significant domestic semiconductor industry is taking shape.
Trump Win Could Mean Big Questions for Manufacturing as while Trump vowed to keep American manufacturing jobs, he offered little in the way of stated policy other than the promise to punish companies that sent manufacturing job outside the US. Questions about trade also could directly affect US manufacturing. How that plays out is a big unknown.
Europe will try to advance chip manufacturing, but not much results in 2017 as currently there is almost no leading-edge digital chip manufacturing left in Europe as the local companies have embraced outsourcing of digital semiconductor manufacturing to foundries. The European Commission intends to reconvene a high-level group of European CEOs and executives to exchange views on Europe’s 10/100/20 nanoelectronics and chip manufacturing project and make adjustments as necessary for a wave of European Union investment supposedly starting in 2020. The two most advanced wafer fab locations left in Europe in terms of deep sub-micron miniaturization belong to Intel in Leixlip, Ireland and Globalfoundries in Dresden, Germany.
Smaller geometries are to be taken into use and researched in 2017. Several chipmakers ramp up their 10nm finFET processes, with 7nm just around the corner. As TSMC, GF/Samsung Battle at 7nm the net result is in the course of 18 months chip designers will see at least three variants of 7nm — separate immersion variants from TSMC and Globalfoundries and the EUV version from GF/Samsung. Intel has yet to detail its 7nm node.
At the same time R&D has begun for 5nm and beyond, but Uncertainty Grows For 5nm, 3nm as costs are skyrocketing. Both 5nm and 3nm present a multitude of unknowns and challenges. To put this in perspective, there are roughly two silicon atoms in 1nm of line width in a chip. Etching Technology Advances as atomic layer etch (ALE) moves to the forefront of chip-making technology—finally. TSMC recently announced plans to build a new fab in Taiwan at a cost of $15.7 billion targeted for TSMC’s 5nm and 3nm processes, which are due out in 2020 and 2022.
Moore’s Law continues to slow as process complexities and costs escalate at each node. Moore’s Law is dead, just not in the way everyone thinks. SiFive believes open source hardware is the way forward for the semiconductor industry. Technological advances keep allowing chips to scale, but the economics are another story – particularly for smaller companies that can’t afford chips in the volumes. The solution, according to San Francisco-based startup, SiFive, is open-source hardware, specifically an architecture developed by the company’s founders called RISC-V (pronounced “risk-five”). Done right SiFive, which was awarded Startup of the Year at the 2016 Creativity in Electronics (ACE) Awards, believes that RISC-V will do for the hardware industry what Linux has done for software. For example 5th RISC-V Workshop Points to Growing Interest in the RISC-V Platform.
Sensors are hot in 2017. These tiny, powerful solutions are creating the interface between the analog and the digital world. Data is everywhere, and sensors are at the very heart of that. While no one really knows what technology’s next “killer application” will be, we are confident that any killer app will rely on sensors.Appliance autonomy promises to make life simpler, but this field has still lots of to improve even after year 2017.
Interface ICs will continue to help simplify high-bandwidth designs while making them more robust and reliable. Application areas that will benefit include automotive, communications, and industrial. Both wired and wireless interface solutions have plenty of applications.
Analog’s status is rising as more sensors and actuators are added into electronic devices, pressure is growing to more seamlessly move data seamlessly back and forth between analog and digital circuitry. IoT pushes up demand for analog content and need for communication between these two worlds will continue to grow. Analog and digital always have fit rather uncomfortably together, and that discomfort has grown as SoCs are built using smaller feature sizes. The demand for analog silicon has always existed in the embedded space, but the advent of the Internet of Things (IoT) is increasing the demand for connected mixed-signal content. At 28nm and 16/14nm, standard “analog” IP includes a fair amount of digital content.
It seems that hardware designer is a disappearing resource and software is the king in 2017. It is becoming less and less relevant in what format the device is used in many applications. Card computers are standard products and are found in many different card formats that can be used in very many applications. Embedded development is changing to more and more coding. More software designers that understand some hardware are needed, but it is not easy to leap to move to the hardware to software.
The power electronics market is moving at very fast pace. Besides traditional industrial, renewable, and traction sectors, new applications such as energy-storage systems, micro-grids, and dc chargers are emerging. As the automotive world moves to electric vehicles, this creates challenges for IGBT and SiC-MOSFET ICs, and their associated gate drivers. New packages for high-voltage IGBTs and high-voltage SiC-MOSFETs are introduced.
More custom power distribution and higher voltages on data center computer systems in 2017. OpenRack and OpenCompute projects are increasing the distribution voltage inside the server itself. This approach, plus transitioning to new materials such as gallium nitride in the power-conversion systems, can reduce overall power consumption by 20% and increase server densities by 30-40%.”
Power Modules and Reference Designs will be looked at in 2017 even more than earlier in power electronics. The semiconductor and packaging technologies used in power modules have advanced considerably, and the industry is developing modules today that are denser, less expensive, and easier to use. Designers want to rely on power modules to speed up designs and optimize space using smaller, easy-to-use power modules. Module manufacturers hope that engineers will increasingly choose a module over a discrete design in many applications.
The bi-directional DC/DC converter has been around for a while, but new applications are quickly emerging which necessitate the use of this architecture in so many more systems. Battery back-up systems need bi-directional DC/DC converters. Applications today require better energy efficiency and such systems as green power with solar or wind generation, need storage so that when there is no wind or sun available the electricity flow is not interrupted.
Power supplies need to become more efficient. Both European Union’s (EU) Code of Conduct (CoC) Tier 1 and CoC Tier 2 efficiency standards are to be taken into use. The European Union’s CoC Tier 1 effectively harmonizes the EU with US DoE Level VI and became effective as a voluntary requirement from January 2014, two years ahead of Level VI. Its adoption as an EU Ecodesign rule is currently under review to become law with an implementation date of January 2017. The key difference between the CoC requirements and Level VI is the new 10% load measure, which imposes efficiency requirements under a low-load condition where historically most types of power supplies have been notoriously inefficient. CoC Tier 2 further tightens the no-load and active mode power consumption limits.
During 2016, wireless-power applications started to pick up across many fields in the semiconductor industry, and it will continue to do so. Wireless power will continue to gain traction with increased consumer demand. Hewlett Packard, Dell, jjPlus, and Witricity have already announced products based on Airfuel standards. And, products based upon the Qi standard will continue to grow at a rapid pace.
Other prediction articles:
In Power & Analog 2017 Forecast: What Experts Are Saying article representatives from major players in the semiconductor industry share their predictions for 2017 regarding power modules, wireless power, data converters, wireless sensing, and more.
Looking Ahead to 2017 article tells on to what SIA is focused on working with. “U.S. semiconductor technology should be viewed as a strategic national asset, and the Administration should take a holistic approach in adopting policies to strengthen this vital sector,” the letter says
Hot technologies: Looking ahead to 2017 article collection has EDN and EE Times editors explore some of the hot technologies in 2017 that will shape next year’s technology trends and beyond.
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Tomi Engdahl says:
CEO Outlook: Chip Design 2017
Political uncertainty, tempered optimism, continued consolidation, and concerns about capacity.
http://semiengineering.com/ceo-outlook-2017/
After two consecutive flat to slightly down years, the semiconductor industry is poised for growth in 2017.
Cowan this month predicted 4.7% growth in semiconductor sales in 2017, while World Semiconductor Trade Statistics (WSTS) put that figure at 3.3%. And last month, International Business Strategies (IBS) pegged the number at 4.6%, according to statistics compiled by the Global Semiconductor Alliance (GSA).
Tomi Engdahl says:
China’s Memory Drama: Must-See in 2017
http://www.eetimes.com/document.asp?doc_id=1331028&
China’s growing presence in M&A negotiations for U.S. chip companies is this year’s one of the biggest untold business stories, and probably 2017, too.
China’s voracious appetite for the access to memory technologies (and her plans to locally produce memory chips) has yet to be satisfied.
Tomi Engdahl says:
EV Battery Demand Will Soar in 2017
Bigger vehicle batteries mean more cell production.
https://www.designnews.com/automotive-0/ev-battery-demand-will-soar-2017/88073998846207?cid=nl.x.dn14.edt.aud.dn.20161227.tst004c
With more automakers aiming to market cheaper, longer-range plug-in cars, demand for lithium-ion automotive batteries is expected rise sharply in 2017.
The key to the market growth, experts say, is the use of battery packs that are in some cases two to three times bigger than those employed in electric cars just five years ago. “When you look at some of the models coming out — like the BMW i3, the Volkswagen e-Golf, and the Chevy Bolt — you can easily see that pack sizes are getting larger, Christopher Robinson, an energy storage analyst at Lux Research Inc., told Design News . “And 2017 is the year that a lot of those models are releasing the bigger packs.”
By incorporating bigger batteries, the new vehicles will offer greater all-electric ranges. The Chevy Bolt, for example, will feature a battery of approximately 60 kWh, which is expected to produce a range of 238 miles. Similarly, the Tesla Model 3 is expected to use a battery of more than 50 kWh to produce a range of about 215 miles when it hits the streets late in 2017. And Volkswagen recently announced that its new e-Golf will feature a 35.8-kWh battery, resulting in a range of about 120 miles. Other big battery improvements are expected from Nissan’s all-electric Leaf and the BMW’s i3.
Tomi Engdahl says:
Hot technologies: Looking ahead to 2017
http://www.edn.com/design/systems-design/4443135/Hot-technologies–Looking-ahead-to-2017-?_mc=NL_EDN_EDT_EDN_review_20161230&cid=NL_EDN_EDT_EDN_review_20161230&elqTrackId=f82375cf4f2a46668f2e169a9e94f3fc&elq=bddf0e711bd7424591376ddb8ff61a9a&elqaid=35343&elqat=1&elqCampaignId=30892
Sensors seem to be everywhere these days as we speed toward a more connected world, and so, many of this year’s predictions for the Hot Technologies of 2017 cover how sensors and other new technologies will make us more connected and efficient.
Here, EDN and EE Times editors explore some of the hot technologies in 2017 that will shape next year’s technology trends and beyond.
Tomi Engdahl says:
Intel Finds Moore’s Law’s Next Step At 10 Nanometers
https://slashdot.org/story/17/01/02/0140207/intel-finds-moores-laws-next-step-at-10-nanometers
Sometime in 2017, Intel will ship the first processors built using the company’s new, 10-nanometer chip-manufacturing technology. Intel says transistors produced in this way will be cheaper than those that came before, continuing the decades-long trend at the heart of Moore’s Law
Intel Finds Moore’s Law’s Next Step at 10 Nanometers
In 2017, the company will exploit its manufacturing edge to create a new generation of chips
http://spectrum.ieee.org/semiconductors/devices/intel-finds-moores-laws-next-step-at-10-nanometers
These days, forecasts about the future of Moore’s Law tend to look quite gloomy. But Intel’s outlook—at least for the next few years—is decidedly bright.
Sometime in 2017, Intel will ship the first processors built using the company’s new, 10-nanometer chip-manufacturing technology.
Sometime in 2017, Intel will ship the first processors built using the company’s new, 10-nanometer chip-manufacturing technology. Intel says transistors produced in this way will be cheaper than those that came before, continuing the decades-long trend at the heart of Moore’s Law
And, for the first time, the company will optimize its manufacturing technology to accommodate other companies that wish to use Intel’s facilities to produce chips based on ARM architecture, which is nearly ubiquitous in modern mobile processors.
Intel has released few figures to date on the dimensions of the new generation.
The minimum gate pitch will go from 70 nm to 54 nm. And logic cells—transistor combinations used to perform standard logic functions—can be less than 46 percent the size of those built on 14-nm technology.
This is a more aggressive level of miniaturization than in years past
Even though the cost of producing a wafer full of chips will be higher at 10 nm than at 14, Intel says the cost per transistor will be lower. The 10-nm chips are also expected to deliver improvements to switching speed and energy consumption.
At 10 nm, the company aims to introduce two of these deminodes (10 nm+ and 10 nm++) before it introduces its next manufacturing generation at 7 nm.
Samsung and TSMC are also making 10-nm chips; in October, Samsung announced that it is the first to reach mass production, with devices bearing its 10-nm chips launching in early 2017. GlobalFoundries is opting to go straight to 7 nm beginning in 2018.
Tomi Engdahl says:
Latch-Based RAMs and the Hidden Capacitor
http://www.eetimes.com/author.asp?section_id=36&doc_id=1331074&
Is there a place for a volatile DRAM replacement? While the VLT as a DRAM replacement might be attractive, any success hinges on effective and innovative solutions to some major problems.
Two types of device offer this latched memory DRAM replacement possibility. One is based on a single crystal thyristor structure of the type proposed by Kilopass using their vertical layer thyristor structure VLT-RAM
Thin-film threshold DRAMs
If all the hype regarding 3DXPoint is to be believed, the Intel/Micron teams must have — in addition to developing and producing a reliable memory device — also developed a thin film matrix isolation device with a level of switching reliability greater than that of the memory in order to deal with multiple read operations on the same memory bit.
it might be possible to use this highly reliable threshold switch as the stacked DRAM replacement of the future along the lines of the VLT device.
Is there a place for a volatile DRAM replacement? Kilopass clearly thinks there is
Tomi Engdahl says:
Obama to Urge Protection for Chip Industry
http://www.eetimes.com/document.asp?doc_id=1331080&
Before he leaves office later this month, U.S. President Barack Obama is preparing to recommend that the U.S government toughen its stance against Chinese investment in the semiconductor industry, according to the Wall Street Journal.
Tomi Engdahl says:
Foxconn boosting automated production in China
http://www.digitimes.com/news/a20161229PD206.html
Foxconn Electronics is automating production at its factories in China in three phases, aiming to fully automate entire factories eventually
Foxconn has deployed more than 40,000 Foxbots, industrial robots developed and produced in house, at factories in China, Dai said. Foxconn can produce about 10,000 Foxbots a year. In addition to industrial robots, Foxconn is developing robots for use in medical care, Dai said.
Tomi Engdahl says:
Silicon Photonics Merging Ahead
http://www.eetimes.com/author.asp?section_id=36&doc_id=1331087&
Silicon photonics has made considerable progress in a relatively short time to emerge as an important systems technology whose time has come.
Just over a decade ago the likes of Intel and IBM were announcing performance records for the basic silicon photonics building blocks — modulators and detectors — used to make optical devices. Now, companies are shipping complex silicon photonics-based integrated circuits as part of their products.
For now, chip and optical component design are distinct cultures. But the semiconductor and photonics worlds are merging, and once they do change will be rapid. The chip industry will start driving silicon photonics.
The Telecom Infra Project is an example of the two industries merging. TIP is an industry initiative that includes Facebook and ten telecom operators. At its first summit last November the Voyager packet-optical platform was announced. The one rack-unit white box includes a Broadcom Tomahawk 3.2Tbits/s switch chip and two Acacia 400-gigabit coherent optical transceivers.
https://telecominfraproject.com/
Tomi Engdahl says:
SiFive: Low-Cost Custom Silicon
Company seeks to build solutions based on open-source processor cores.
http://semiengineering.com/sifive-low-cost-custom-silicon/
One of the lessons learned years ago in the open-source Linux world is that free software isn’t always good enough. Consequently, being able to add commercial value around freeware can turn into a lucrative business.
Red Hat Software, for example, has turned this approach into a thriving multi-billion-dollar business. But nothing comparable has ever succeeded in the SoC world.
Enter SiFive, a startup that has been building customized platforms based on the RISC-V CPU. Started by the creators of the RISC V instruction set architecture (ISA), the company’s stated goal is to shake up the economics of the chip industry.
“There are a lot of customers today without access to silicon today,”
“We’re not looking at building chips for cell phone application processors. It’s everything else. Customers buy off-the-shelf FPGAs because they never thought they could get custom silicon.”
SiFive’s approach is to create 80% of the chip ahead of time, including IP, a tool flow, and an existing fab relationship. “We work with companies on the portion that needs customization, but 80% of that is provided freely and openly,” Kang said. “There is already a robust ecosystem in place. That’s how you solve the scaling issue.”
Tomi Engdahl says:
BEOL Issues At 10nm And 7nm
http://semiengineering.com/beol-issues-at-10nm-and-7nm-2/
Experts at the table, part 2: The impact and cost of air gap; reducing RC delay with liner-less approaches and cobalt; where EUV will make a dent…maybe.
Tomi Engdahl says:
Distributor Avnet gazes into the mobility market’s crystal ball
http://www.cablinginstall.com/articles/pt/2016/12/distributor-avnet-gazes-into-the-mobility-market-s-crystal-ball.html
As 2017 begins, distributors will need to invest and expand into next-generation technology enablers to ensure that they are able to provide value-added services to the channel ecosystem. As a part of this, 2017 will likely see distributors investing in value-added solutions for enterprise mobility, particularly focusing on specializing in mobility capabilities and solutions, Mobile Application Development platforms, automated mobile quality, deployment of devices and applications, and smart wireless infrastructure.
Tomi Engdahl says:
Hands On With The First Open Source Microcontroller
http://hackaday.com/2017/01/05/hands-on-with-the-first-open-source-microcontroller/
2016 was a great year for Open Hardware. The Open Source Hardware Association released their certification program, and late in the year, a fe pleasew silicon wizards met in Mountain View to show off the latest happenings in the RISC-V instruction set architecture.
The RISC-V ISA is completely unlike any other computer architecture.
We’ve seen a lot of RISC-V stuff in recent months, from OnChip’s Open-V, and now the HiFive 1 from SiFive.
Free Software and Open Hardware is a religion, and it’s significantly more difficult to produce Open Hardware than Free Software. No matter how good or how Open the design is, the production of the first Open Source microcontroller will generate far too many comments from people who use the words ‘moral imperative’ while citing utilitarian examples of why Open and Libre is good.
The Openness of the HiFive 1 and RISC-V
The biggest selling point for RISC-V chips is that there are no licensing fees, and this microcontroller is Open Source. This is huge — your AVRs, PICs, ARMs, and every other microcontroller on the planet is closed hardware.
If we’re ever going to get a completely Open Source computer, it has to start somewhere, and here it is.
With that said, this is an Arduino-compatible board with an FTDI chip providing the USB to serial conversion. If we had a facepalm emoji, we’d use it here. An FTDI chip is not Open Source, and they have designed drivers to break chips that aren’t theirs. The design files for the HiFive 1 were made with Altium, a proprietary and non-Free software.
Will Stallman ever say the HiFive 1 is Free as in speech? Absolutely not. Instead, the HiFive 1 is an incrementally more Free microcontroller compared to a PIC, ARM, or AVR.
The HiFive 1 supports 3.3 and 5V I/O, thanks to three voltage level translators.
The folks at SiFive realize documentation and SDKs are necessary to turn a chip into a development board. To that end, they have a bare-metal SDK and support for the Arduino IDE.
Right now there are two methods of programming the HiFive 1. The Freedom E SDK, and the Arduino IDE.
Right now, the SDK only works under Linux
This test used this Dhrystone Arduino sketch with the Arduino Micro, HiFive 1, and the Teensy 3.6. As you would expect the Arduino Micro performed poorly (but still ten times faster than a mainframe from 1988), and the Teensy 3.6 was extremely fast.
HiFive 1 is fast. Really, really fast.
The HiFive 1 has more Flash (although it’s an SPI Flash), it has DMA, and it has roughly twice the processing power as the Teensy 3.6.
Admittedly, I do have a very early version of this board, and the CrowdSupply campaign for the HiFive 1 was only funded last week.
At the base level, the HiFive 1 is a powerful microcontroller with a lot of Flash, with support for hundreds of Arduino libraries. That’s great, and alone this might be worth the $60 price of admission.
https://www.crowdsupply.com/sifive/hifive1
Tomi Engdahl says:
16-bit SAR ADC packs eight channels
http://www.edn.com/electronics-products/other/4443245/16-bit-SAR-ADC-packs-eight-channels?_mc=NL_EDN_EDT_EDN_productsandtools_20170109&cid=NL_EDN_EDT_EDN_productsandtools_20170109&elqTrackId=cda00476edaa4d818460eaf6b15a9cf5&elq=f8616d5f1e36495383217270d1827ce8&elqaid=35453&elqat=1&elqCampaignId=31000
Tomi Engdahl says:
RF energy: Measurements improve cooking, lighting, and more
http://www.edn.com/design/test-and-measurement/4443086/RF-energy–Measurements-improve-cooking–lighting–and-more?_mc=NL_EDN_EDT_EDN_today_20170109&cid=NL_EDN_EDT_EDN_today_20170109&elqTrackId=b933eee51f1445bb9e803f084c66785a&elq=759304f44ac742eab540b9884df7e783&elqaid=35447&elqat=1&elqCampaignId=30994
Power transistors such as these from MACOM and Ampleon can produce 300 W of power at 2.45 GHz.
“RF energy could change the way we cook food,” said Werner, “but it’s being used in other applications.” He explained that RF energy, generated by RF transistors in power amplifiers, could replace the magnetrons in microwave ovens. By generating energy with semiconductors and more than one antenna (Figure 1), microwave ovens could produce energy sufficient for cooking and adapt to changing conditions as food cooks. That can result in more even cooking than we currently get from our microwave ovens, which essentially operate as on/off, open-loop systems. Instead, the next generation of microwave ovens will have complete closed-loop control.
As with any closed-loop system, this design requires feedback, and that means measurement. Although today’s microwave ovens may use moisture sensors to provide some feedback, that’s an indirect measurement. Solid-state microwave ovens can get a measurement on the load itself.
With return-loss (S11) measurements from the couplers, the control system can adjust the RF heating signal’s amplitude, frequency (between 2.4 GHz and 2.5 GHz), and phase (to any angle). The system can make adjustments for each antenna, thus altering the energy field in different parts of the cavity.
Tomi Engdahl says:
5 More Mistakes to Avoid in Product Development
Here are some of the key mistakes observed in hundreds of product development teams.
https://www.designnews.com/design-hardware-software/5-more-mistakes-avoid-product-development/111577560547214?cid=nl.x.dn14.edt.aud.dn.20170105.tst004t
1. Failure to Confront the Issues
Escalating bad news is, at best, painful. It is not uncommon for poorly managed teams or companies to want to “shoot the messenger.” Is it any wonder that team members will sit on problems, trying to brute force through obvious failure, rather than raise their hand to identify the issue?
2. Losing Control of the BOM
In a well-structured set of product requirements, this “top down” approach is validated through a rough “bottoms up” evaluation to ensure that the goals are right from a business standpoint and are realistically achievable.
3. Wrong Team
There is no project so small that it cannot be screwed up.
4. Ignoring Market Intelligence
The world is a dynamic place and the pace of change and new product introductions is accelerating.
It is not uncommon for new product development processes to take nine months to two years (or more in some product categories — especially medical devices).
Failure to recognize that the original requirements or feature sets need to change due to market realities can result in a product launched according to plan but months too late.
5. Failure to Execute on the Full Set of Deliverables
Many products suites are composed of a core product with a range of complementary accessories required at product release. In the best projects, the core product teams are properly staffed and are working to a set of appropriate, well-defined requirements.
Tomi Engdahl says:
Near-field scanning: useful or misleading?
http://www.edn.com/electronics-blogs/the-emc-blog/4443189/Near-field-scanning–useful-or-misleading-?_mc=NL_EDN_EDT_EDN_weekly_20170105&cid=NL_EDN_EDT_EDN_weekly_20170105&elqTrackId=8209dc9452b549f5af576edb2eb3ac82&elq=938c119eaa8647d3b2736df13ffaf909&elqaid=35419&elqat=1&elqCampaignId=30966
Near-field probes are useful tools for locationing the sources of emissions on PCBs, cables, and enclosures. Under certain conditions, the signals you see on a spectrum analyzer from a near-field probe can be misleading. With experience, you can overcome these obstacles.
Suppose you have a product that is failing emissions limits, and you try to determine the cause of those emissions. To find where on a PCB the emissions might originate, you might use a simple magnetic-field probe (see figure) connected to a spectrum analyzer.
Before you can really say that you’ve located the source of the far-field emission, however, you must consider two things:
What caused the probe to indicate high-signal levels?
Is this field a propagating field?
Another very common debug technique is to use a magnetic probe to “sniff” around the seams of a shielded enclosure to find where an offending emission is leaking. Because the surface currents on the enclosure can’t travel across an aperture, they will divert around an aperture and can often be sensed with the magnetic field probe. This is fine, so far.
Measurements can be a great emotional comfort. But, you should understand how the measurement is actually being made, so you can insure that you’re (1) making a good measurement of the thing we wish to measure, and (2) that your conclusions are reasonable and based in physics.
Tomi Engdahl says:
Process Makes Smaller, Cheaper Chips
Berkeley shows implant replacing SADP
http://www.eetimes.com/document.asp?doc_id=1331098&
Berkeley researchers described a technique that they say cuts the cost and time of making leading-edge chips while creating features smaller than today’s most advanced processes. The so-called tilted ion implantation (TII) process created features as small as 9 nm.
The lab work shows promise for reducing the rapidly increasing cost and complexity of making chips, which has slowed progress in Moore’s law. However, it’s unclear whether chip makers will adopt the technique.
“We are using argon ions to selectively damage certain parts of the silicon dioxide layer,”
The approach could cut 50% off the costs of the widely used self-align double patterning (SADP) technique used today at 16 nm and beyond while improving throughput by as much as 35%, he said.
Tomi Engdahl says:
White House Report Warns of China’s Threat to Chip Industry
http://www.eetimes.com/document.asp?doc_id=1331115&
SAN FRANCISCO—The White House on Friday (Jan. 6) made public a strongly worded report on the U.S. semiconductor industry and the threat posed to it by China’s aggressive ambition to become a global player in the chip space.
The report, made to U.S. President Barack Obama by the President’s Council of Advisors on Science & Technology (PCAST), argues that the U.S. semiconductor industry needs to innovate and “run faster” in order to counter the threat posed by Chinese policies that distort the market in its favor.
Tomi Engdahl says:
Electronic Device Markets Seen as Stagnant in 2017
http://www.eetimes.com/document.asp?doc_id=1331097&
SAN FRANCISCO—Combined shipments of PCs, mobile handsets and tablets—the drivers of much of the electronics supply chain over the past few years—are projected to remain flat in 2017, according to market research firm Gartner Inc.
Combined shipments of such devices are forecast to be 2.3 billion in 2017, roughly the same as the estimated total for 2016, Gartner said this week.
“The global devices market is stagnating,” said Ranjit Atwal, a research director at Gartner, in a statement. “Mobile phone shipments are only growing in emerging Asia/Pacific markets, and the PC market is just reaching the bottom of its decline.”
Tomi Engdahl says:
Dawn of the Brain-Gate Era: PCM Electro-Migration Problem Solved
http://www.eetimes.com/author.asp?section_id=36&doc_id=1331104&
If papers from IEEE’s 2016 IEDM in Dec are any indication, it appears the era of PCM and RRAM based brain-gates is upon us. Here’s Part I of a 2-Part blog based on IEDM gems.
Tomi Engdahl says:
5 Technology Areas to Watch in 2017
http://mwrf.com/semiconductors/5-technology-areas-watch-2017?NL=MWRF-001&Issue=MWRF-001_20170110_MWRF-001_398&sfvc4enews=42&cl=article_1_b&utm_rid=CPG05000002750211&utm_campaign=9197&utm_medium=email&elq2=c3ecc5592d174e76943044a0dd7caa12
This year, expect to see the RF/microwave industry produce solutions that push technological boundaries to meet new and emerging requirements.
When forecasting what 2017 has in store for the RF/microwave landscape, it led to one concrete conclusion: The industry is primed to continue delivering its share of innovative technology solutions.
1. Semiconductor Technology
By now, GaN technology’s huge impact on RF/microwave technology should be apparent to all in the industry (Fig. 1). In 2017, we can surely expect to see GaN in heavy doses.
2. Filter Requirements
Intensifying demands of mobile communications have created a need for more advanced RF filter solutions (Fig. 2). Firms such as Qorvo and Broadcom represent two of the major players in this space. However, newer companies like Resonant and Akoustis are now making their presence felt, too.
3. Antenna Solutions
Another key technology area that bears watching in 2017 is the antenna. Interestingly enough, the large number of people who are dropping cable service, or “cord-cutting,” has led to greater demands for adequate antenna performance, according to one company.
4. Design Tools
Soon, 5G may transform the way that products are designed and built, with simulation software playing a key role. “In 2017, emerging 5G technologies and the increasing power of low-cost software-defined radios (SDRs) will change the way that engineers research, design, and build wireless products,”
5. Changing Test Needs
New advances in wireless communications will have a major impact on test-and-measurement requirements. Several different technologies can be considered driving factors.
“IEEE 802.11ax is not simply the next version of Wi-Fi,” explains Smith. “It represents a fundamental change in the way that Wi-Fi operates. “Simplistically speaking, Wi-Fi is borrowing from cellular by adopting techniques used in LTE.
LitePoint is also offering test solutions to support LPWAN technologies. Smith notes, “LPWAN technologies, such as Sigfox, LoRa, and LTE Cat-NB1, seek to meet the emerging requirements for the Industrial Internet of Things (IIoT) market.
Taking all of these potential advances into consideration, 2017 looks to be an eventful year for the RF/microwave industry. As 5G and other new technologies loom on the horizon, companies are focused on delivering the next generation of design and test solutions.
Tomi Engdahl says:
Process Makes Smaller, Cheaper Chips
Berkeley shows implant replacing SADP
http://www.eetimes.com/document.asp?doc_id=1331098&
Berkeley researchers described a technique that they say cuts the cost and time of making leading-edge chips while creating features smaller than today’s most advanced processes. The so-called tilted ion implantation (TII) process created features as small as 9 nm.
“We are using argon ions to selectively damage certain parts of the silicon dioxide layer,”
Tomi Engdahl says:
Electronics can be printed on paper
uke University in Durham, chemists have found that membranes made of silver nano wires conduct electricity well enough so that they can form functional circuits without heating. This makes it possible to print electronics heat sensitive material such as paper or plastic.
Investigators were surprised how much larger long nanowires films conductivities were compared to others. They resistivity was only 10 times higher than that of pure silver.
Source: http://etn.fi/index.php?option=com_content&view=article&id=5660:elektroniikkaa-voidaan-tulostaa-paperille&catid=13&Itemid=101
Tomi Engdahl says:
The new high-speed mobile bus is ready
MIPI Alliance has completed a new I3C-bus, which simplifies smartphones, wearable devices, IoT systems and automotive electronics interface. Over time it is expected to replace the existing I2C bus.
Source: http://etn.fi/index.php?option=com_content&view=article&id=5658&via=n&datum=2017-01-10_15:38:24&mottagare=30929
Tomi Engdahl says:
Blog Review: Jan. 11
http://semiengineering.com/blog-review-jan-11/
ATPG and Moore’s Law; finFET challenges; building an emulator; US government report on semiconductors; wearables here to stay; power design.
Tomi Engdahl says:
The Power And Limits Of Money
http://semiengineering.com/the-power-and-limits-of-money/
What motivates successful engineering organizations, and why Google, Facebook and Amazon don’t get or keep all the talent.
SE: How can semiconductor companies ensure their engineering dollars are well spent?
Rhines: Spending earlier is better in any design project. The problem is the tendency to put off the spending until things get tough, which is really just passing the buck. Take a design’s power budget. Early in the architecture if it doesn’t get there, maybe you have some uncertainties. But you are always aware that you have to keep the schedule, and people start to feel that ‘we have to keep moving in the program’ squeeze. What that can mean is the last person gets stuck with an impossible goal. It’s human nature to put things off and think things will get better. But, they don’t always get better. And we all know, there is a budgeted amount [of man-hours and resource-spending]. Squeezing people is a motivator in many cases. But sometimes it’s the father of poor products and late products.
SE: What about salaries? How do semiconductor companies pay enough for the engineers they need but not blow their budgets? How important is being the top salary payer?
Rhines: I’m probably in the minority on this, but I’ve been at this a long time. Over my years of experience, people want to be paid fairly but they really want to be part of something exciting and feel valued.
One company I worked at had a semiconductor project. It was a very aggressive program for a microprocessor, but it had gotten out of control. It was late. People started to put on the squeeze: ‘Just get the tape out,’ and ‘Just do what you have to do.’ You cannot force good people, good engineers, to do bad work. It makes them unhappy and causes problems. And no amount of money changes that.
Tomi Engdahl says:
Programming the Open-V Open Source CPU on the Web
http://hackaday.com/2017/01/11/programming-the-open-v-open-source-cpu-on-the-web/
You can now program the Open-V on the web, and see the results in real time. The code is compiled in the web IDE and then flashed to a microcontroller which is connected to a live YouTube live stream. It’s pretty neat to flash firmware on a microcontroller thousands of miles away and see the development board blink in response.
http://onchip.uis.edu.co/
Tomi Engdahl says:
Four laser companies to exceed $1 billion revenue in 2016
http://www.laserfocusworld.com/articles/2016/12/four-laser-companies-to-exceed-1-billion-revenue-in-2016.html
Tomi Engdahl says:
Optical fibers made solely of water can sense minute forces
http://www.laserfocusworld.com/articles/print/volume-52/issue-11/newsbreaks/optical-fibers-made-solely-of-water-can-sense-minute-forces.html?cmpid=enl_LFW_Newsletter_2017-01-11
Researchers at Technion Israel Institute of Technology (Haifa, Israel) have created something unusual in the field of photonics—an optical fiber that is entirely liquid. The water-based fiber, which can be longer than a millimeter while having a diameter of only around 5 μm, could be useful in sensing minute forces. In particular, the researchers say that, in comparison to microelectromechanical-systems (MEMS) sensing devices, the microelectrocapillary-systems (MECS) fiber is a million times softer, greatly improving its sensitivity.
The creation and sustaining of such an optical fiber is based on a phenomenon that has been known for more than a century, but has never before been used for guiding light.
Applying a 3 kV voltage across the two couplers causes the water fiber to form. In one example, input light at a 770 nm wavelength is transmitted at a 54% efficiency through a 0.83-mm-long water fiber.
Tomi Engdahl says:
Material Turns Cars, Buildings Into Electricity Sources
Recently developed paintable thermoelectric materials that can turn industrial waste heat into electricity
https://www.designnews.com/materials-assembly/material-turns-cars-buildings-electricity-sources/86158119047237?cid=nl.x.dn14.edt.aud.dn.20170111.tst004t
Imagine if the heat from a car, building, or laptop could be converted into electricity that could be reused. This is a possible future scenario thanks to researchers in Korea, who have developed thermoelectric (TE) materials that can be painted onto various surfaces to allow industrial waste heat to be converted into electricity.
Jae Sung Son, a professor in the Materials Science and Engineering department at the Ulsan National Institute of Science and Technology (UNIST), led the research to develop these high-performance, liquid-like TE materials that are shape-engineerable and geometrically compatible so that they can be directly brush-painted on almost any surface.
Tomi Engdahl says:
Additive Manufacturing Holds Key to Efficient, Cost-Effective Development of Flexible Electronics
Researchers demonstrate how additive manufacturing can be used to combine rigid components with elastomers to develop flexible, or “stretchable” electronics.
https://www.designnews.com/materials-assembly/additive-manufacturing-holds-key-efficient-cost-effective-development-flexible-electronics/36821708147251?cid=nl.x.dn14.edt.aud.dn.20170111.tst004t
Tomi Engdahl says:
The Chemical Tests of the Future Could Move onto Chips
http://electronicdesign.com/electromechanical/chemical-tests-future-could-move-chips
Marcel Zevenbergen imagines chemical sensors that are the size of a fingernail, measure chloride levels in a farm’s water supply, and stream data wirelessly for months. These are not the cattail-shaped electrodes and analytical machines that scientists have traditionally used to measure chemicals in fluid.
Zevenbergen is a senior researcher at the Holst Centre, a Dutch microelectronics lab where engineers are trying to shrink such chemical sensors down into silicon chips. These devices largely missed out on the falling cost and dimensions of other sensors for measuring pressure or temperature.
Holst Centre and imec Introduce World\’s First Solid-State Multi-Ion Sensor for Internet-of-Things Applications
https://www.holstcentre.com/news—press/2016/ion-sensor/
imec, the world-leading research and innovation hub in nano-electronics and digital technology and Holst Centre debuted a miniaturized sensor that simultaneously determines pH and chloride (Cl-)levels in fluid. This innovation is a must have for accurate long-term measurement of ion concentrations in applications such as environmental monitoring, precision agriculture and diagnostics for personalized healthcare. The sensor is an industry first and thanks to the SoC (system on chip) integration it enables massive and cost-effective deployments in Internet-of-Things (IoT) settings.
Tomi Engdahl says:
ASE: The challenge and importance of MEMS and sensor packaging
http://www.edn.com/design/analog/4443240/ASE–The-challenge-and-importance-of-MEMS-and-sensor-packaging?_mc=NL_EDN_EDT_EDN_analog_20170112&cid=NL_EDN_EDT_EDN_analog_20170112&elqTrackId=3eb71d69b5ad44ce8c6261ba03929df7&elq=75983181a3fb41608ed0ee567c26b941&elqaid=35492&elqat=1&elqCampaignId=31031
MEMS and sensor devices have catapulted the Internet of Things (IoT) toward the deployment of billions of sensors in a myriad of applications in electronics technology that will improve the world around us as well as enhance the human condition. In reality MEMS and sensors exist today with incredible capabilities which are continuously being enhanced with more integration. Their physical size is shrinking and the energy needed to power them is ever being lowered.
Smart module and SiP integration will allow the huge deployment of connected devices in the IoT. To enable this, the different solution providers within the value chain will need to work together. A simplified supply chain needs to emerge and system integrators need to develop things like design kits for industry design engineers to evaluate different system configurations before designing a specific module or SiP.
ASE Group has a design kit (DK) that will help designers to get a faster time-to-market.
Designers can go from prototype to production inside of four months with a development kit like this.
Stress optimization is a critical aspect of the package design for a MEMS/sensor design.
Applications such as consumer products and smartphones sometimes attach sensors to glass. Strong modeling is a must here
Automotive is a fast growing market for the electronics industry. This sector has far different needs and demands for their MEMS package requirements than most industries.
A good example of an application in a smart sensor system could be a small hand-held device with light, proximity, and direction sensing, or a body motion sensor array, or even a physiological sign monitoring and reporting device. Design engineers seek enhanced software, greater connectivity, and sophisticated hardware
There are so many optical sensor designs in the market today and one especially growing segment is the wearables sector.
The key challenge here actually does not involve MEMS and sensors packaging itself; instead, the main challenge will be for the outsourced assembly and test (OSAT) community to effectively deliver the most suitable architecture to meet customer module and/or SiP integration needs.
Tomi Engdahl says:
7nm Design Success Necessitates A Multi-Physics Approach
Chip-package-system co-design helps produce more cost-effective and reliable designs.
http://semiengineering.com/7nm-design-success-necessitates-a-multi-physics-approach/
Whether you are designing an energy efficient mobile device, or an ADAS platform with stringent reliability requirements, or a high performance enterprise networking system, chips fabricated on advanced technologies such as 7-nanometer (nm) process and 2.5/3D or wafer level packaging can provide several advantages. Designs using these technologies consume less power while delivering higher throughput and performance gains. They enable you to design chips with smaller form factor with higher levels of integration.
However, these benefits come with challenges that cannot be sufficiently addressed by traditional design and analysis methodologies. Following a traditional silo based design approach, chip, package, board and system designers use pre-determined margins to design their specific component.
Need for multi-domain/multi-physics co-analysis
With tighter noise margins, higher junction temperatures and greater risk from reliability failures, it is no longer sufficient to design and analyze each component separately, nor is it acceptable to consider only single physics at a time. Package or board parasitics can have significant impact on chips’ performance. Likewise, chips’ current distribution can affect the systems’ power integrity (PI), signal integrity (SI) temperature and reliability.
Tomi Engdahl says:
The Challenges Of Designing 28G And 56G SerDes IP
Identifying the most important aspects of SerDes IP design.
http://semiengineering.com/the-challenges-of-designing-28g-and-56g-serdes-ip/
The industry move to 56 Gbps PAM4 is undoubtedly one of the greatest challenges currently facing SerDes IP designers and their customers. To begin with, shifting to 56 Gbps PAM4 immediately causes a loss of 9 dB. While the baud rate is 28 Gbaud, there are now three eyes stacked on top of each other. Nevertheless, there is still demand for 35+ dB reach. This is a significant challenge which requires adopting an ADC based architecture for next-generation SerDes IP.
Of course, even 28 Gbps NRZ signaling poses significant challenges for customers integrating SerDes IP. Firstly, the PCB material requires an upgrade. Secondly, careful analysis needs to be performed on the package and PCB to ensure there is adequate isolation to minimize crosstalk.
This is precisely why it is critical for IP vendors to offer IBIS AMI simulation models, which allows customers to understand the results of their specific package and board design choices. The s-parameter models are typically made available by cable and connector vendors. The s-parameters for the package and PCB can be extracted or measured with a VNA. In addition to IBIS AMI simulation models, piecewise linear current models (PWL) are needed for simulation of the analog power rails.
Beyond simulations, SerDes IP should provide highly programmable circuits and contain debug interfaces to easily gather important analog and digital information, i.e., an ATEST pin that allows measuring various analog voltages and currents
Tomi Engdahl says:
Power State Switching Gets Tougher
Understanding and implementing power state switching delays can make or break a design.
http://semiengineering.com/power-state-switching-complexity-grows/
Power state switching delay is a key factor in minimizing power, and getting it right frequently means the difference between a successful design and a dead chip. But tradeoffs are intricate, complex and often involve judgment calls, making this a place where designs can go completely awry.
For years, traditional, full-swing CMOS process technologies were used with CMOS-style logic circuits.
“The best way of reducing power at that point was to try to stop the activity. The easiest way to stop the activity in a synchronous digital circuit is to stop the clock, so clock gating became the thing to do.”
Today, layers of clock gating are implemented in complex designs. But it can be difficult for the hardware to determine when is the right time to shut off the clock, which is why many design teams now use software for clock gating.
“The microprocessor would write to some register that would stop the clock over here on this part of the chip,”
“Then leakage happened, and as we advanced in process technologies and transistors got shorter”
Managing the leakage also has pushed more power management into software, because the approaches all tend to take a little bit more time than just stopping the clock.
The challenge is that as more things are continually integrated onto the same number of square millimeters of silicon, which equates to ever-denser process technologies, there are more transistors that could be leaking. So even more ways of pulling out power need to be employed. “If we can make power state switching faster, we can take advantage of ever-shorter moments of time in which the circuit is going to be idle, which means all the control must be moved back into hardware,”
Tomi Engdahl says:
Mobile Processors Move Beyond Phones
Qualcomm, other vendors look to autos, drones, and other applications.
http://semiengineering.com/mobile-processors-move-beyond-smartphones/
Mobile processors, also known as application processors, are well-known as the engines that run smartphones, tablet computers, and other wireless devices. But these chips increasingly are finding their way into autonomous vehicles, the Internet of Things, unmanned aerial vehicles, virtual reality, and other applications far beyond phone calls and text messages. Moreover, they are gaining in complexity as they are adapted for other markets.
This shift was evident at this month’s Consumer Electronics Show. Little attention was paid to smartphones and their apps, even though this is still one of the largest markets for complex SoCs. The real buzz was artificial intelligence, big data, machine learning, and self-driving cars.
As the market for smartphones and tablets flatten, processor vendors and their many suppliers in design software and services are branching out.
“Qualcomm maintained its smartphone AP market share leadership despite MediaTek’s strong inroads in 1H 2016,”
Blurring the lines
Mobile processors historically have fallen into two main buckets, those with a modem and those without. But that distinction is becoming fuzzier.
Bigger, faster, more complex
With these advanced SoCs, bigger, faster, and more heterogeneous are competitive advantages. Multi-core chips are almost required, and the vast majority have between four and eight cores.
Driving sales
Arvind Narayanan, product marketing architect at Mentor Graphics, looks to the next wave in mobile processors, with significant growth in AI, automotive-class chips, and IoT. Image sensors are key to self-driving cars.
“There’s so much demand in that area,” he says. “There’s going to be a lot more chips in these cars. That will help us in EDA.”
Tomi Engdahl says:
2017: Manufacturing And Markets
http://semiengineering.com/predictions-for-2017-manufacturing-and-markets/
Part 1: The future of Moore’s Law, new architectures and packaging, and a spike in automotive, artificial intelligence and virtual/augmented reality.
While the industry is busy chatting about the end of Moore’s Law and a maturing of the semiconductor industry, the top minds of many companies are having none of it. A slowdown in one area is just an opportunity, in another and that is reflected in the predictions for this year.
Tomi Engdahl says:
Why do users buy test gear? – Part 4: Maintenance
http://www.edn.com/electronics-blogs/test-cafe/4443158/Why-do-users-buy-test-gear—-Part-4–Maintenance?_mc=NL_EDN_EDT_EDN_weekly_20170112&cid=NL_EDN_EDT_EDN_weekly_20170112&elqTrackId=dc51fc6134164c1da967dbf1d2716795&elq=25c9f9511c494d18a6db468b8873da90&elqaid=35503&elqat=1&elqCampaignId=31043
Tomi Engdahl says:
Tech Industry More Optimistic About Trump Presidency Than Public
https://www.designnews.com/business/tech-industry-more-optimistic-about-trump-presidency-public/44107291947265?cid=nl.x.dn14.edt.aud.dn.20170112.tst004t
So-called “technology elites” and the general public don’t share the same optimism about Trump’s impact on the technology industry, according to a recent survey.
How will Donald Trump’s presidency impact the US technology industry? According to a December 2016 survey of the general public and the technology industry, the general public doesn’t share much of the same optimism as so-called “technology elites,” individuals who either work in technology or invest in the technology sector. The Burson-Marsteller Age of Trump Technology Policy Survey , which included 1,000 respondents from the US general public and 500 technology elites, found that 76% of technology elites say the best days of the US technology industry are still ahead, compared with 59% of the general public. Fifty-nine percent of technology elites also believe the Trump administration will be favorable to the technology industry, compared with 50% of the general public, as noted in the December survey.
Tomi Engdahl says:
PC Shipments Decline for 5th Straight Year
http://www.eetimes.com/document.asp?doc_id=1331169&
SAN FRANCISCO—PC shipments declined for a fifth consecutive year in 2016 as the industry continued to suffer from stagnation and lack of compelling drivers for upgrades, according to market research firms Gartner Inc. and International Data Corp. (IDC).
Both Gartner and IDC estimated that PC shipments declined about 6% in 2016.
The global PC market has been in decline since 2012
Tomi Engdahl says:
ISO 26262 Training, A Good Investment
http://www.eetimes.com/author.asp?section_id=36&doc_id=1331160&
ISO 29292 is a goal-based standard, not a prescriptive standard. Upfront training of design engineers on the standard can go a long way.
Designing an IC is complicated. Designing an IC for safety critical automotive applications is even more so.
In addition to the usual power, performance, area, cost and time-to-market specifications, automotive ICs must comply with safety, security and reliability requirements such as those outlined in the ISO 26262 Safety Standard. The current ISO 26262:2012 Safety Standard has 10 chapters and about 475 pages.
There are several providers of ISO 26262 training. We recommend using a company that also does safety assessments for the types of systems or ICs that you’re developing.
Tomi Engdahl says:
No Sign of 450mm on the Horizon
http://www.eetimes.com/document.asp?doc_id=1331180&
Momentum behind the push to transition the semiconductor industry to 450mm wafers–which seemed substantial just a few short years ago–now appears all but dead, at least for now.
“450 is probably dead for another five to 10 years,”
“All the partners agreed that it’s not the right time to continue to focus on 450,”
“The equipment companies generally don’t want [450mm] after what happened with 300mm,”
Hutcheson added that the initial push for 450mm came from a belief that chip makers needed an alternative way to increase sales if the industry could no longer keep on pace with Moore’s Law. But, Moore’s Law “clearly has not ended,” Hutcheson said. “What happened is that the shrinks have slowed down the growth of the silicon.”
Without sufficient demand for the larger wafer size, building a 450mm fab would require chip makers to take 300mm fabs offline.
“450 died because it’s one generation too far,”
In addition to proving that 450mm is technically viable, the consortium resulted in other valuable advancements
Tomi Engdahl says:
TSMC Expects Flat Year for Foundry
http://www.eetimes.com/document.asp?doc_id=1331168&
Taiwan Semiconductor Manufacturing Co. expects 2017 to be a flat year for the foundry business as momentum in the chip business stalls.
TSMC said it expects low-end smartphones to lead growth with gains reaching 8 percent, while the high-end segment including Apple’s iPhone will expand by 3 percent this year. Even so, TSMC said that silicon content in smartphones will increase in the high single digits.
The world’s largest chip foundry predicted that during this year, the global semiconductor market will grow by 4 percent while the foundry business expands by about 7 percent and TSMC’s business increases within a range of 5 to 10 percent. TSMC posted NT$947.9 billion ($29.9 billion) in revenue for 2016, increasing 12.4 percent from 2015.
Tomi Engdahl says:
Process Makes Smaller, Cheaper Chips
Berkeley shows implant replacing SADP
http://www.eetimes.com/document.asp?doc_id=1331098&
Berkeley researchers described a technique that they say cuts the cost and time of making leading-edge chips while creating features smaller than today’s most advanced processes. The so-called tilted ion implantation (TII) process created features as small as 9 nm.
The approach could cut 50% off the costs of the widely used self-align double patterning (SADP) technique used today at 16 nm and beyond while improving throughput by as much as 35%, he said.
“Implantation is very cheap … compared to SADP, with its multiple layer deposition and etch process,”
Tomi Engdahl says:
China Defends Big Chip Bet
Huali, AMEC execs share their views
http://www.eetimes.com/document.asp?doc_id=1331154
Two senior China executives defended the country’s big bet on its semiconductor industry here a week after a White House report called for international action against practices it called unfair. Executives from fab and capital equipment companies said the China government is not being unfair in the way it supports its still-infant industry.
The China national and provincial governments along with private investors aim to spend as much as $160 billion dollars over the next few years growing China’s semiconductor industry. U.S. chip makers are concerned the government help puts an unfair finger on the scale in what is seen as the largest growth market for semiconductors for the next several years.
Tomi Engdahl says:
15 Views from a Silicon Summit
Macro to nano perspectives of chip horizon
http://www.eetimes.com/document.asp?doc_id=1331185
Semiconductor advances could continue through 2025 with extreme ultraviolet lithography (EUV) coming online in 2020, said tech experts at the annual Industry Strategy Symposium here. Market watchers shared long-term forecasts for mid-single-digit growth with this year performing above average.
“I don’t believe Moore’s law is dead and the deep techs don’t believe it either,” he said, noting both Intel and Globalfoundries now report cost savings in post-14nm nodes. “I think we have a path that produces transistors that scale down in cost,” he said.
He predicted a 5nm node could hit starting in late 2019 using EUV in at least some steps, probably still using some form of FinFETs as transistors. Beyond that a 3.5nm generation moving to horizontal nanowires could mark the last node for classical scaling.
Tomi Engdahl says:
Crossbar ReRAM in Production at SMIC
http://www.eetimes.com/document.asp?doc_id=1331173&
Crossbar Inc. (Santa Clara, Calif.), a developer of non-volatile resistive RAM (ReRAM) based on silver-over-amorphous-silicon technology, kept its promise to be in production in 2016.
The Crossbar ReRAM for embedded non-volatile memory applications is in production at partner foundry Semiconductor Manufacturing International Corp. (SMIC) using a 40nm CMOS process and is sampling to SMIC customers, according to Sylvain Dubois, Crossbar’s vice president of strategic marketing and business development.
Tomi Engdahl says:
Additive Manufacturing Holds Key to Efficient, Cost-Effective Development of Flexible Electronics
https://www.designnews.com/materials-assembly/additive-manufacturing-holds-key-efficient-cost-effective-development-flexible-electronics/36821708147251?cid=nl.x.dn14.edt.aud.dn.20170113.tst004t
Researchers demonstrate how additive manufacturing can be used to combine rigid components with elastomers to develop flexible, or “stretchable” electronics.