Electronics trends for 2018

Here are some of my collection of newest trends and predictions for year 2018. I have not invented those ideas what will happen next year completely myself. I have gone through many articles that have given predictions for year 2018. Then I have picked and mixed here the best part from those articles (sources listed on the end of posting) with some of my own additions to make this posting.This article contains very many quotations from those source articles (hopefully all acknowledged with link to source).

The general trend in electronics industry is that the industry growth have been driven by mobile industry. Silicon content in smartphones and other mobile devices is increasing as vendors add greater functionality. Layering on top of that are several emerging trends such as IoT, big data, AI and smart vehicles that are creating demand for greater computing power and expanding storage capacity.

 

Manufacturing trends

According to Foundry Challenges in 2018 article the silicon foundry business is expected to see steady growth in 2018. The growth in semiconductor manufacturing will remain steady, but there will be challenges in the manufacturing capacity and  expenses to move to the next nodes. For most applications, unless you must have highest levels of performance, there may not be as compelling a business case to focus on the bleeding-edge nodes. Over the last two years, the IC industry has experienced an acute shortage of 200mm fab capacity (legacy MCU, power, sensors, 6-micron to 65nm). In 2018, 200mm capacity will remain tight. An explosion in 200mm demand has set off a frenzied search for used semiconductor manufacturing equipment that can be used at older process nodes. The problem is there is not enough used equipment available. The profit margins in manufacturing are so thin in markets served by those fabs that it’s hard to justify paying current rising equipment prices, and newcomers may have a tough time making inroads. Foundries with fully depreciated 200mm equipment and capacity already are seeing increased revenues in their 200mm business.The specialty foundry business is undergoing a renaissance, thanks to the emergence of 5G and automotive.

300mm is expected to follow a similar path for lack of capacity because 300mm fabs already produce leading-edge chips and more mainstream 300mm demand is driven by MCUs, wireless communications and storage applications. Early predictions are for solid growth in 2018, fueled by demand for memory and logic at advanced 10/7nm

In 2017, marking the first time that the semiconductor equipment market has exceeded the previous market high of US$47.7 billion set in 2000. Fab tool vendors found themselves in the midst of an unexpected boom cycle in 2017, thanks to enormous demand for equipment in 3D NAND and, to a lesser degree, DRAM. In 2018, equipment demand looks robust, although the industry will be hard-pressed to surpass the record growth figures in 2017. In 2018, 7.5 percent growth is expected to result in sales of US$60.1 billion for the global semiconductor equipment market – another record-breaking year. Demand looks solid across the three main growth drivers for fab tool vendors—DRAM, NAND and foundry/logic.
Rising demand for chips is hitting the IC packaging supply chain, causing shortages of select manufacturing capacity, various package types, leadframes and even some equipment. Spot shortages for some IC packages began showing up in 2017, but the problem has been growing and spreading since then, so  packaging customers may encounter select shortages well into 2018Apple Watch 3 shipment growth to benefit Taiwan IC packagers in 2018.

Market for advanced packaging begins to diverge based on performance and price. Advanced Packaging is now viewed as the best way to handle large amounts of data at blazing speeds.

Moore’s law

Many recent publications say Moore’s Law is dead. Though Moore’s Law is dead may be experiencing some health challenges, it’s not time to start digging the grave for the semiconductor and electronics market yet

Even smaller nodes are still being taken to use in high end chips. The node names are confusing. Intel’s 10nm technology is roughly equivalent to the foundry 7nm node.In 2018, Intel is expected to finally ramp up 10nm finally in the first half of 2018. In addition, GlobalFoundries, Samsung and TSMC will begin to ship their respective 7nm finFET processes. On the leading edge, GlobalFoundries, Intel, Samsung and TSMC start migrating from the 16nm/14nm to the 10nm/7nm logic nodes. It is expected that some chip-makers face some challenges on the road. Time will tell if GlobalFoundries, Samsung and TSMC will struggle at 7nm. Early predictions are for solid growth in 2018, fueled by demand for memory and logic at advanced 10/7nm. 7nm is projected to generate sales from $2.5 billion to $3.0 billion in 2018. Over time 10nm/7nm is expected to be a big and long-running node. Suppliers of FPGAs and processors are expected to jump on 10nm/7nm.

South Korea’s Samsung Electronics said it has commenced production of the second generation of its 10nm-class 8-Gb DDR4 DRAM. Devices labeled 10nm-class have feature sizes as small as 10 to 19 nanometers. With the continued need for shrinking pattern dimensions, semiconductor manufacturers continue to implement more complex patterning techniques, such as advanced multi-patterning, for the 10nm design node and beyond. They also are investing significant development effort in readying EUV lithography for production at the 7/5nm design nodesSamsung is planning to begin transitioning to EUV for logic chips next year at the 7nm node, although it is unclear when the technology will be put into production for DRAM.

There will be talk on even smaller nodes. FinFETs will get extended to at least to 5nm, and possibly 3nm in next 5 years. The path to 5nm loks pretty clear. FinFETs will get extended at least to 5nm. It’s possible they will get extended to 3nm. EUV will be used at new nodes, followed by High NA Lithography. New smaller nodes challenges the chip design as abstractions become more difficult at 7nm and beyond. Models are becoming more difficult to develop, integrate and utilize effectively at 10/7nm and beyond as design complexity, process variation and physical effects add to the number of variables that need to be taken into account. Materials and basic structures may diverge by supplier, at 7 nm and beyond. Engineering and scientific teams at 3nm and beyond will require completely different mixes of skills than today.

Silicon is still going strong, but the hard fact is that CMOS has been running out of steam for several nodes, and that becomes more obvious at each new node. To extend into new markets and new process nodes Chipmakers Look To New Materials. There are a number of compounds in use already (generally are being confined to specific niche applications), such as gallium arsenide, gallium nitride, and silicon carbide. Silicon will be supplemented by 2D materials to extend Moore’s Law. Transition metal dichalcogenides (TMDCs), a class of 2D materials derived from basic elements—principally tellurium, selenium, sulfur, and oxygen—are being widely explored by researchers. TMDCs are functioning as semiconductors in conjunction with graphene. Graphene, the wonder material rediscovered in 2004, and a host of other two-dimensional materials are gaining ground in manufacturing semiconductors as silicon’s usefulness begins to fade. Wide-bandgap semiconductor materials like gallium nitride (GaN) and silicon carbide (SiC) are anticipated to be used in many more applications in 2018. Future progress increasingly will require a mix of different materials and disciplines, but silicon will remain a key component.

Interconnect Materials need to to be improved. For decades, aluminum interconnects were the industry standard. In the late 1990s, chipmakers switched to copper. Over the years, transistors have decreased dramatically in size, so interconnects also have had to scale in size leading to roadblock known as the RC challenge. Industry is investing significant effort in developing new approaches to extend copper use and finding new metals. There’s also some investigation into improvements on the dielectric side. The era of all-silicon substrates and copper wires may be coming to an end.

Application markets

Wearables are a question mark. Demand for wearables slowed down in 2017 so much that smart speakers likely outsold wearable devices in 2017 holiday season.  eMarketer is estimating that usage of wearable will grow just 11.9 percent in 2018, rising from 44.7 million adult wearable users in 2017 to 50.1 million in 2018. On the other hand market research firm IDC estimates that the shipments of wearable electronics devices are projected to more than double over the next five years as watches displace fitness trackers as the biggest sellers. IDC forecasts that wearables shipments will increase at a compound annual growth rate of 18.4 percent between 2017 and 2021, rising from 113.2 million this year to 222.3 million in 2021. At the same time fitness trackers are expected to become commodity product. Tomorrow’s wearables will become more fully featured and multi-functional.

The automotive market for semiconductors is shifting into high gear in 2018. Right now the average car has about $350 worth of semiconductor content, but that is projected to grow another 50% by 2023 as the overall automotive market for semiconductors grows from $35 billion to $54 billion. The explosion of drive-by-wire technology, combined with government mandates toward fully electric powertrains, has changed this paradigm—and it impacts more than just the automotive industry. Consider implications beyond the increasingly complex vehicle itself, including new demands on supporting infrastructure. The average car today contains up to 100 million lines of code. Self-driving car will have considerably more code in it. Software controls everything from safety critical systems like brakes and power steering, to basic vehicle controls like doors and windows. Meeting ISO 26262 Software Standards is needed but it will not make the code bug free. It’s quickly becoming common practice for embedded system developers to isolate both safety and security features on the same SoC. The shift to autonomous vehicles marks a major shift in the supply chain—and a major opportunity.

Many applications have need for a long service life — for example those deployed within industrial, scientific and military industries. In these applications, the service life may exceed that of component availability. Replacing an advanced, obsolete components in a design can be very costly, potentially requiring an entire redesign of the electronic hardware and software. The use of programmable devices helps designers not only to address component obsolescence, but also to reduce the cost and complexity of the solution. Programmable logic devices are provided in a range of devices of different types, capabilities and sizes, from FPGAs to System on Chips (SoC) and Complex Programmable Logic Devices (CPLD). The obsolete function can be emulated within the device, whether it is a logic function implemented in programmable logic in a CPLD, FPGA or SoC, or a processor system implemented in an FPGA or SoC.

Become familiar with USB type C connector. USB type C connector is becoming quickly more commonplace than any other earlier interface. In the end of 2016 there were 300 million devices using a USBC connection – a big part was smartphones, but the interface was also widespread on laptops. With growth, the USBC becomes soon the most common PC and peripheral interface. Thunderbolt™ 3 on USBC connector promises to fulfill the promise of USB-C for single-cable docking and so much more.

 

Power electronics

The power electronics market continues to grow and gain more presence across a variety of markets2017 was a good year for electric vehicles and the future of this market looks very promising. In 2017, we saw also how wireless charging technology has been adopted by many consumer electronic devices- including Apple smart phones. Today’s power supplies do more than deliver clean and stable dc power on daily basis—they provide advanced capabilities that can save you time and money.

Wide-bandgap semiconductor materials like gallium nitride (GaN) and silicon carbide (SiC) are anticipated to be used in many more applications in 2018. At the moment, the number of applications for those materials is steadily increasing in the automotive and military industry. Expect to see more adoption of SiC and GaN materials in automotive market.

According to Battery Market Goes Bigger and Better in 2018 article advances in battery technologies hold the keys to continuing progress in portable electronics, robotics, military, and telecommunication applications, as well as distributed power grids. It is difficult to see lithium-ion based batteries being replaced anytime soon, so the advances in battery technology are primarily through the application of lithium-ion battery chemistries. New battery protection for portable electronics cuts manufacturing steps and costs for Lithium-ion.

Transparency Market Research analysts predict that the global lithium-ion battery market is poised to rise from $29.67 billion in 2015 to $77.42 billion in 2024 with a compound annual growth rate of 11.6 %. That growth has already spread from the now ubiquitous consumer electronics segment to automotive, grid energy, and industrial applications. Dramatic increase is expected for battery power for the transportation, consumer electronic, and stationary segments. According to Bloomberg New Energy Finance (BNEF), the global energy-storage market will double six times between 2016 and 2030, rising to a total of 125 G/305 gigawatt-hours. In 2018, energy-storage systems will continue proliferating to provide backup power to the electric grid.

Memory

Memory business boomed in 2017 for both NAND and DRAM. The drivers for DRAM are smartphones and servers. Solid-state drives (SSDs) and smartphones are fueling the demand for NAND.  Both the DRAM and NAND content in smartphones continues to grow, so memory business will do well in 2018.Fab tool vendors found themselves in the midst of an unexpected boom cycle in 2017, thanks to enormous demand for equipment in 3D NAND and, to a lesser degree, DRAMIn 2018, equipment demand looks robust, although the industry will be hard-pressed to surpass the record growth figures in 2017.

NAND Market Expected to Cool in Q1 from the crazy year 2017, but it is still growing well because there is increasing demand. The average NAND content in smartphones has been growing by roughly 50% recently, going from approximately 24 gigabytes in 2016 to approximately 38 gigabytes today.3D NAND will do the heavy memory lifting that smartphone users demand. Contract prices for NAND flash memory chips are expected to decline in during the first quarter of 2018 as a traditional lull in demand following the year-end quarter.

Lots of 3D NAND will go to solid state drives in 2018. IDC forecasts strong growth for the solid-state drive (SSD) industry as it transitions to 3D NAND.  SSD industry revenue is expected to reach $33.6 billion in 2021, growing at a CAGR of 14.8%. Sizes of memory chips increase as number of  layer in 3D NAND are added. We’ve already scaled up to 48 layers. Does this just keep scaling up, or are there physical limits here? Maybe we could see a path to 256 layers in few years.

Memory — particular DRAM — was largely considered a commodity business. Though that it’s really not true in 2017. DRAM memory marked had boomed in 2017 at the highest rate of expansion in 23 years, according to IC Insights. Skyrocketing prices drove the DRAM market to generate a record $72 billion in revenue, and it drove total revenue for the IC market up 22%. Though the outlook for the immediate future appears strong, a downturn in DRAM more than likely looms in the not-too-distant future. It will be seen when there are new players on the market. It is a largely unchallenged assertion that Chinese firms will in the not so distant future become a force in semiconductor memory market. Chinese government is committed to pumping more than $160 billion into the industry over a decade, with much of that ticketed for memory startups.

There is search for faster memory because modern computers, especially data-center servers that skew heavily toward in-memory databases, data-intensive analytics, and increasingly toward machine-learning and deep-neural-network training functions, depend on large amounts of high-speed, high capacity memory to keep the wheels turning. The memory speed has not increased as fast as the capacity. The access bandwidth of DRAM-based computer memory has improved by a factor of 20x over the past two decades. Capacity increased 128x during the same period. For year 2018 DRAM remains a near-universal choice when performance is the priority. There has been some attempts to very fast memory interfaces. Intel the company has introduced the market’s first FPGA chip with integrated high-speed EMBED (Embedded Multi-Die Interconnect Bridge): The Stratix 10 MX interfaces to HMB2 memory (High Memory Bandwidth) that offers about 10 times faster speed than standard DDR-type DIMM.

There is search going on for a viable replacement for DRAM. Whether it’s STT-RAM or phase-change memory or resistive RAM, none of them can match the speed or endurance of DRAM. Necessity is the mother of invention, and we see at least two more generations after 1x. XPoint is also coming up as another viable memory solution that could be inserted into the current memory architecture. It will be interesting to see how that plays out versus DRAM.

5G and IoT

5G something in it for everyone. 5G is big.  5G New Radio (NR) wireless technology will ultimately impact everyone in the electronics and telecommunications industries. Most estimates say 2020 is when we will ultimately see some real 5G deployments on a scale. In the meantime, companies are firming up their plans for whatever 5G products and services they will offer. Though test and measurement solutions will be key in the commercialization cycle. 5G is set to disrupt test processes. If 5G takes off, the technology will propel the development of new chips in both the infrastructure and the handset. Data centers require specialty semiconductors from power management to high-speed optical fiber front-ends. 5G systems will drive more complexity in RF front-ends .5G will offer increased capacity and decreased latency for some critical applications such as vehicle-to-vehicle (V2V) or vehicle-to-infrastructure (V2I) communications for advanced driver assistance systems (ADAS) and self-driving vehicles. The big question is whether 5G will disrupt the landscape or fall short of its promises.

Electronics manufacturers expect a lot from Internet of Thing. The evolution of intelligent electronic sensors is creating a revolution for IoT and Industrial IoT as companies bring new sensor-based, intelligent systems to market. The business promise is that the proliferation of smart and connected “things” in the Industrial Internet of Things (IIoT) provides tremendous opportunities for increased performance and lower costs. Industrial Internet of Things (IIoT) has a market forecast approaching $100 billion by 2020. Turning volumes of factory data into actionable information that has value is essential. Predictive maintenance and asset tracking are two big IoT markets to watch in 2018 because they will provide real efficiencies and improved safety. It will be about instrumenting our existing infrastructures with sensors that improve their reliability and help predict failures. It will be about tracking important assets through their lifecycles.

A new breed of designers has arrived that is leveraging inexpensive sensors to build the intelligent systems at the edge of the Internet of Things (IoT). They work in small teams, collaborate online, and they expect affordable design tools that are easy to use in order to quickly produce results. Their goal is to deliver a functioning device or a proof-of-concept to their stakeholders while spending as little money as possible to get there. We need to become multi-functional engineers who can comfortably work in the digital, RF, and system domains.

The Io edge sensor  device usually needs to be cheap. Simple mathematical reasoning suggests that the average production cost per node must be small, otherwise the economics of the IoT simply are not viable. Most suppliers to the electronics industry are today working under the assumption that the bill-of-materials (BoM) cost of a node cannot exceed $5 on average. While the sensor market continues to garner billions of dollars, the average selling price of a MEMS sensor, for example, is only 60 cents.

Designing a well working and secure IoT system is still hard. IoT platforms are very complex distributed systems and managing these distributed systems is often an overlooked challenge. When designing for the IoT, security needs to be addressed from the Cloud down to each and every edge device. Protecting data is both a hardware and a software requirement, as more data is being stored and analyzed in edge devices and gateways.

The continued evolution of powerful embedded processors is enabling more functionality to be consolidated into single heterogeneous multicore devices. You will see more mixed criticality designs – those designs which contain both safety-critical and non-safety critical processes running on the same chip. It’s quickly becoming common practice for embedded system developers to isolate both safety and security features on the same SoC.

AI

There is clearly a lot of hype surrounding machine learning (ML) and artificial intelligence (AI) fields. Over the past few years, machine learning (ML) has evolved from an interesting new approach that allows computers to beat champions at chess and Go, into one that is touted as a panacea for almost everything. Machine learning already has delivered beneficial results in certain niches, but it has potential for a bigger and longer lasting impact because of the demand for broad insights and efficiencies across industries. Also EDA companies have been investing in this technology and some results are expected to be announced.

The Battle of AI Processors Begins in 2018. Machine learning applications have a voracious appetite for compute cycles, consuming as much compute power as they can possibly scrounge up. As a result, they are invariably run on parallel hardware – often parallel heterogeneous hardware—which creates development challenges of its own. 2018 will be the start of what could be a longstanding battle between chipmakers to determine who creates the hardware that artificial intelligence lives on. Main contenders on the field at the moment are CPUs, GPUs, TPUs (tensor processing units), and FPGAs. Analysts at both Research and Markets and TechNavio have predicted the global AI chip market to grow at a compound annual growth rate of about 54% between 2017 and 2021.

 

Sources:

Battery Market Goes Bigger and Better in 2018

Foundry Challenges in 2018

Smart speakers to outsell wearables during U.S. holidays, as demand for wearables slows

Wearables Shipments Expected to Double by 2021

The Week In Review: Manufacturing #186

Making 5G Happen

Five technology trends for 2018

NI Trend Watch 2018 explores trends driving the future faster

Creating Software Separation for Mixed Criticality Systems

Isolating Safety and Security Features on the Xilinx UltraScale+ MPSoC

Meeting ISO 26262 Software Standards

DRAM Growth Projected to be Highest Since ’94

NAND Market Expected to Cool in Q1

Memory Market Forecast 2018 … with Jim Handy

Pushing DRAM’s Limits

3D NAND Storage Fuels New Age of Smartphone Apps

$55.9 Billion Semiconductor Equipment Forecast – New Record with Korea at Top

Advanced Packaging Is Suddenly Very Cool

Fan-Outs vs. TSVs

Shortages Hit Packaging Biz

Apple Watch 3 shipment growth to benefit Taiwan IC packagers in 2018

Rapid SoC Proof-of-Concept for Zero Cost

EDA Challenges Machine Learning

What Can You Expect from the New Generation of Power Supplies?

Optimizing Machine Learning Applications for Parallel Hardware

FPGA-dataa 10 kertaa nopeammin

The 200mm Equipment Scramble

Chipmakers Look To New Materials

The Trouble With Models

What the Experts Think: Delivering the next 5 years of semiconductor technology

Programmable Logic Holds the Key to Addressing Device Obsolescence

The Battle of AI Processors Begins in 2018

For China’s Memory Firms, Legal Tests May Loom

Predictions for the New Year in Analog & Power Electronics

Lithium-ion Overcomes Limitations

Will Fab Tool Boom Cycle Last?

The Next 5 Years Of Chip Technology

Chipmakers Look To New Materials

Silicon’s Long Game

Process Window Discovery And Control

Toward Self-Driving Cars

Sensors are Fundamental to New Intelligent Systems

Industrial IoT (IIoT) – Where is Silicon Valley

Internet of things (IoT) design considerations for embedded connected devices

How efficient memory solutions can help designers of IoT nodes meet tight BoM cost targets

What You Need to Become a Multi-Functional Engineer

IoT Markets to Watch in 2018

USBC yleistyy nopeasti

1,325 Comments

  1. Tomi Engdahl says:

    Globalfoundries Focuses on What It Does Differently
    https://www.electronicdesign.com/embedded-revolution/globalfoundries-focuses-what-it-does-differently?NL=ED-003&Issue=ED-003_20181003_ED-003_904&sfvc4enews=42&cl=article_2_b&utm_rid=CPG05000002750211&utm_campaign=20402&utm_medium=email&elq2=5a7891567a5b48cebe1f98b09ddc47c5

    Last month, Globalfoundries pulled out of the race to manufacture 7-nanometer chips. Instead, the second largest made-to-order chip manufacturer said that it is now focused on enhancing its existing technology. On Wednesday, the company said that it is looking to give chips based on its 12-nanometer FinFet process 15 percent more density and 10 percent more performance than its 14-nanometer technology.

    Globalfoundries said that it would target both FinFet nodes at markets like autonomous cars and data centers. Chips based on the 14-nanometer node can leverage 55 percent more computing power and 60 percent lower power than those based on 28-nanometers.

    The announcement is aimed at counterbalancing the recent turmoil at the roughly $6-billion business, which employs around 17,000 people globally.

    Reply
  2. Tomi Engdahl says:

    GaN Basics: FAQs
    https://www.powerelectronics.com/gan-transistors/gan-basics-faqs?PK=UM_Classics10118&utm_rid=CPG05000002750211&utm_campaign=20440&utm_medium=email&elq2=d9ec3dbf2fcb45eb8a21cc380e4cad95

    Gallium nitride transistors have emerged as a high-performance alternative to silicon-based transistors, thanks to the technology’s ability to be made allow smaller device sizes for a given on-resistance and breakdown voltage than silicon.

    What nomenclature do GaN devices employ?
    GaN transistors borrowed the same nomenclature as their silicon brethren: gate, drain and source

    Reply
  3. Tomi Engdahl says:

    On Semiconductor Takes Majority Stake in Wafer Fab
    https://www.electronicdesign.com/analog/semiconductor-takes-majority-stake-wafer-fab?NL=ED-003&Issue=ED-003_20181005_ED-003_757&sfvc4enews=42&cl=article_2_b&utm_rid=CPG05000002750211&utm_campaign=20469&utm_medium=email&elq2=28fcffccbd8c4332a6c9631fd7c50c65

    On Semiconductor announced it would take over the majority of a shared factory to help meet mounting demand for power and analog semiconductors. The company said on Monday that it would pay Fujitsu Semiconductor for another 20 percent of the factory, located in the Japanese city of Aizuwakamatsu, giving it 60 percent of the output.

    Reply
  4. Tomi Engdahl says:

    TSMC Goes Photon to Cloud
    https://www.eetimes.com/document.asp?doc_id=1333827

    TSMC taped out its first chip in a process making limited use of extreme ultraviolet lithography and will start risk production in April on a 5-nm node with full EUV. Separately, the foundry forged partnerships with four partners to support online services for back-end chip design.

    The foundry’s update showed that area and power gains continue in its leading-edge nodes, but chip speeds are no longer advancing at their historic rate. To compensate, TSMC gave an update on a half-dozen packaging techniques that it is developing to speed connections between chips.

    Backers say that cloud-based services will shorten the time and extend the reach of chip design tools, helping expand a semiconductor industry facing the slowdown of Moore’s Law. However, they note that cloud design is still in an early phase that typically requires setting up and optimizing custom sites.

    Reply
  5. Tomi Engdahl says:

    The Next Big Chip Companies
    https://semiengineering.com/the-next-big-chip-companies/

    Who will win in a world where architecture and packaging are now differentiators, and where intelligence, connectivity and security are the new prerequisites.

    Reply
  6. Tomi Engdahl says:

    eFPGA vs. FPGA Design Methodologies
    https://semiengineering.com/efpga-vs-fpga-design-methodologies/

    Working with discrete versus embedded programmable logic.

    Reply
  7. Tomi Engdahl says:

    3D Printing of a ‘Bionic’ Eye
    https://www.designnews.com/materials-assembly/3d-printing-bionic-eye/14656380559410?ADTRK=UBM&elq_mid=5943&elq_cid=876648

    University of Minnesota engineers have 3D-printed electronics on a curved surface, paving the way for the future fabrication of an artificial eye that potentially could restore someone’s sight.

    Reply
  8. Tomi Engdahl says:

    Xilinx Details SoC-like FPGAs
    Versal aims to rival Intel, Nvidia processors
    https://www.eetimes.com/document.asp?doc_id=1333815

    Xilinx released the first details of its next-generation Everest architecture, now called Versal. It shows the microprocessor landscape is blurring as CPUs, GPUs and FPGAs morph into increasingly similar SoC-like devices.

    Versal shrinks the size of a central FPGA block to make room for more ARM, DSP, inference and I/O blocks. It comes as Intel and AMD make room for beefier GPUs in their x86 chips and Nvidia adds specialty cores for jobs like deep learning on its GPUs.

    Xilinx positioned Versal as the start of a broad new family of standard products. They aim to outperform CPUs and GPUs on a wide range of data center, telecom, automotive and edge applications and increasingly support programming in high-level languages such as C and Python.

    Reply
  9. Tomi Engdahl says:

    IBM Pushes Beyond 7 Nanometers, Uses Graphene to Place Nanomaterials on Wafers
    https://spectrum.ieee.org/nanoclast/semiconductors/nanotechnology/ibm-electrifies-graphene-to-deposit-nanomaterials-on-a-wafer-scale

    The functionality of devices could be changed simply by changing nanomaterials without impacting the process

    Four years ago, IBM announced that it was investing US $3 billion over the next five years into the future of nanoelectronics with a broad project it dubbed “7nm and Beyond.” With at least one major chipmaker, GlobalFoundries, hitting the wall at the 7-nm node, IBM is forging ahead, using graphene to deposit nanomaterials in predefined locations without chemical contamination.

    In research described in the journal Nature Communications, the IBM researchers for the first time electrified graphene so that it helps to deposit nanomaterials with 97% accuracy.

    “As this method works for a wide variety of nanomaterials, we envision integrated devices with functionalities that represent the unique physical properties of the nanomaterial,”

    Reply
  10. Tomi Engdahl says:

    Why Test Costs Will Increase
    https://semiengineering.com/why-test-costs-will-increase/

    New materials, applications and packaging are changing the economics of testing chips.

    Reply
  11. Tomi Engdahl says:

    EEVblog #1132 – The 3 Cent Microcontroller!
    https://www.youtube.com/watch?v=VYhAGnsnO7w

    Taking a look at a sub 3 cent microcontroller, and other obscure Chinese manufactures, how to find them, and were to get them in stock.

    Reply
  12. Tomi Engdahl says:

    Defect Challenges Growing In Advanced Packaging
    https://semiengineering.com/defect-challenges-growing-in-advanced-packaging/

    Spotting defects with existing inspection tools is getting harder, but upgrading to new technology is expensive.

    Reply
  13. Tomi Engdahl says:

    Apple inks $600M deal to license IP, acquire assets and talent from Dialog to expand chipmaking in Europe
    https://techcrunch.com/2018/10/10/apple-is-paying-300m-in-cash-to-buy-a-part-of-dialog-semiconductor-and-expand-its-chipmaking-in-europe/?sr_share=facebook&utm_source=tcfbpage

    Apple has quietly been putting considerable effort into building faster and more efficient chips that can help differentiate its hardware from the rest of the consumer electronics pack, and today it’s taking its next (and possibly largest) step in that strategy. Apple is paying $300 million in cash to buy a portion of Dialog Semiconductor, a chipmaker based out of Europe that it has been working with since the first iPhone.

    Reply
  14. Tomi Engdahl says:

    Average Power Sensors Don’t Settle for Average Performance
    https://www.mwrf.com/test-measurement/average-power-sensors-don-t-settle-average-performance?NL=MWRF-001&Issue=MWRF-001_20181011_MWRF-001_995&sfvc4enews=42&cl=article_1_b&utm_rid=CPG05000002750211&utm_campaign=20583&utm_medium=email&elq2=227ffd1bdd3349f48cc8d4d6e6809ff2

    We got our hands on a new series of average power sensors from a company that’s been in the business for a long time. Do they measure up?

    Reply
  15. Tomi Engdahl says:

    Part 1 of 2: The End of the Memory Growth Rally? Where Are We in the Memory Inventory Cycle?
    https://blog.semi.org/business-markets/part-1-of-2-the-end-of-the-memory-growth-rally-where-are-we-in-the-memory-inventory-cycle

    Micron, one of the top three memory semiconductor companies, reported solid results for the fourth quarter of fiscal 2018 (June to August) to extend a multi-quarter string of strong growth. However, the company’s mediocre guidance for the current quarter has raised concerns that memory demand will start to slow.

    Reply
  16. Tomi Engdahl says:

    Overcoming challenges of futuristic transistor technology below 5nm node
    https://electroiq.com/2018/10/overcoming-challenges-of-futuristic-transistor-technology-below-5nm-node/

    To scale down a transistor below a 5nm node is one of the vital concerns for VLSI industry as there are various challenges due to the shrinking of components. Several researches are going on worldwide to overcome the challenges of future technology nodes. Among them, this article reviews the potential transistor structures and materials like Carbon Nano-tube FET, Gate-All-Around FET, and Compound Semiconductors as solutions to overcome the problems of scaling the existing silicon FinFET transistor below 5nm node.

    Reply
  17. Tomi Engdahl says:

    Power Delivery Affecting Performance At 7nm
    https://semiengineering.com/power-delivery-affecting-performance-at-7nm/

    Slowdown due to impact on timing, and dependencies between power, thermal and timing that may not be caught by signoff tools.

    Complex interactions and dependencies at 7nm and beyond can create unexpected performance drops in chips that cannot always be caught by signoff tools.

    This isn’t for lack of effort. The amount of time spent trying to determine if an advanced-node chip will work after it is fabricated has been rising steadily for several process nodes. Additional design rules handle everything from variation to power, and the rules deck has been getting thicker as each new process is released. Yet surprises still lurk when silicon comes back, even when every design rule has been met and the chip has passed every form of signoff.

    Reply
  18. Tomi Engdahl says:

    Power Issues Grow For Cloud Chips
    https://semiengineering.com/power-issues-grow-in-high-performance-computing/

    Optimizing processor design in high-performance computing now requires lots of small changes.

    Reply
  19. Tomi Engdahl says:

    Long-Lived Electronics Requires Careful Design
    https://www.designnews.com/content/long-lived-electronics-requires-careful-design/2012293459562?ADTRK=UBM&elq_mid=6003&elq_cid=876648

    Building the electronic systems that control heavy equipment requires that engineers take a long view in design and development.

    Reply
  20. Tomi Engdahl says:

    Week in Review: IoT, Security, Auto
    https://semiengineering.com/week-in-review-iot-security-auto-14/

    Dialog Semiconductor made a blockbuster deal with Apple – the chip company will license power management technologies and transfer some assets to Apple, which will use them in their internal chip research and development. More than 300 Dialog employees, mostly engineers, will join Apple, which will pay $300 million in cash for the transaction and prepay another $300 million for Dialog products to be delivered over three years.

    Reply
  21. Tomi Engdahl says:

    Why graphene hasn’t taken over the world…yet
    https://www.youtube.com/watch?v=IesIsKMjB4Y

    Graphene is a form of carbon that could bring us bulletproof armor and space elevators, improve medicine, and make the internet run faster — some day. For the past 15 years, consumers have been hearing about this wonder material and all the ways it could change everything. Is it really almost here, or is it another promise that is perpetually just one more breakthrough away?

    Reply
  22. Tomi Engdahl says:

    Power Delivery Affecting Performance At 7nm
    https://semiengineering.com/power-delivery-affecting-performance-at-7nm/

    Slowdown due to impact on timing, and dependencies between power, thermal and timing that may not be caught by signoff tools

    Reply
  23. Tomi Engdahl says:

    The Semiconductor Industry Is in Transition
    https://www.electronicdesign.com/analog/semiconductor-industry-transition?NL=ED-003&Issue=ED-003_20181015_ED-003_225&sfvc4enews=42&cl=article_2_b&utm_rid=CPG05000002750211&utm_campaign=20684&utm_medium=email&elq2=37ee289bae494191a6adcc81fab58e0c

    “Monetizing Semiconductors, From Silicon to Services,” a white paper, looks at the present state of the semiconductors and notes changes that are about to occur.

    Reply
  24. Tomi Engdahl says:

    An Illuminating Look at LED Driving
    https://www.electronicdesign.com/analog/illuminating-look-led-driving?Issue=ED-004_20181016_ED-004_843&sfvc4enews=42&cl=article_1_b&utm_rid=CPG05000002750211&utm_campaign=20689&utm_medium=email&elq2=590fb56701b34fb3b3e8b0c7d349eb70

    Sponsored by Texas Instruments: The LED is the dominant lighting solution today, but the processes involved in driving and dimming them are more sophisticated than you perhaps thought.

    Reply
  25. Tomi Engdahl says:

    Anton Shilov / AnandTech:
    Samsung says it has started mass production of 7nm chips using an EUVL process that it claims enables 50% power and 20% performance improvements over 10nm chips — Samsung Foundry on Wednesday said that it had started production of chips using its 7LPP manufacturing technology …

    Samsung Starts Mass Production of Chips Using Its 7nm EUV Process Tech
    by Billy Tallis & Anton Shilov on October 17, 2018 6:00 PM EST
    https://www.anandtech.com/show/13496/samsung-starts-mass-production-of-chips-using-its-7nm-euv-process-tech

    New Tech Brings in Big Gains

    The maker of semiconductors says that 7LPP fabrication technology enables a 40% area reduction (at the same complexity) along with a 50% lower power consumption (at the same frequency and complexity) or a 20% higher performance (at the same power and complexity) when compared to 10LPE. As it appears, usage of extreme ultraviolet lithography for select layers enables Samsung Foundry to place more transistors inside its next-gen SoCs and reduce their power consumption, a very compelling proposition for mobile SoCs that will be used inside future flagship smartphones.

    Samsung produces its 7LPP EUV chips at its Fab S3 in Hwaseong, South Korea. The company can process 1500 wafers a day on each of its ASML Twinscan NXE:3400B EUVL step and scan systems with a 280 W light source.

    usage of EUV enables it to cut the number of masks it requires for a chip by 20%

    it had developed a proprietary EUV mask inspection tool to perform early defect detection

    Samsung Foundry does not disclose the name of its customers that that first to adopt its 7LPP manufacturing technology, but only implies that the first chips to use it will be aimed at mobile and HPC applications. Usually, Samsung Electronics is the first customer of the semiconductor unit to adopt its leading-edge fabrication processes. Therefore, expect a 7nm SoC inside Samsung’s high-end smartphones due in 2019. Furthermore, Qualcomm will use Samsung’s 7LPP tech for its “Snapdragon 5G mobile chipsets”

    Reply
  26. Tomi Engdahl says:

    Communications Rise To Represent Largest Portion of Foundry Sales
    http://www.icinsights.com/news/bulletins/Communications-Rise-To-Represent-Largest-Portion-Of-Foundry-Sales/

    Communications apps expected to account for 3x more than computer in 2018 pure-play foundry sales.

    Reply
  27. Tomi Engdahl says:

    UltraSoC Adds AI to Debugging
    https://www.eetimes.com/document.asp?doc_id=1333869

    Designing a complex SoC by mixing and matching different semiconductor IP cores is hard enough. The job gets tougher, with higher costs and arduous process of the validation and verification, after the SoC comes back from a fab, according to Rupert Baines, CEO of UltraSoC.

    To address such post-silicon woes, UltraSoC, a Cambridge, U.K.-based supplier of advanced debugging and analytic technology for embedded systems, is claiming that it has devised for SoC designers “a complete integrated development environment that combines comprehensive debug, run control, and performance tuning.”

    Reply
  28. Tomi Engdahl says:

    Wafer Shipments Forecast to Set New Highs Through 2021
    http://www.semi.org/en/wafer-shipments-forecast-set-new-highs-through-2021

    Total wafer shipments in 2018 year are expected to eclipse the all-time market high set in 2017 and continue to reach record levels through 2021, according to SEMI’s recent semiconductor industry annual silicon shipment forecast. The forecast of demand for silicon units for the period 2018 through 2021 shows polished and epitaxial silicon shipments totaling 12,445 million square inches in 2018; 13,090 million square inches in 2019; 13,440 million square inches in 2020, and 13,778 million square inches in 2021

    Reply
  29. Tomi Engdahl says:

    Three-Dimensional Printing of a Complete Lithium Ion Battery with Fused Filament Fabrication
    https://pubs.acs.org/stoken/presspac/presspac/full/10.1021/acsaem.8b00885

    Reply
  30. Tomi Engdahl says:

    A Q&A With Micron Technology’s Memory Mastermind
    https://spectrum.ieee.org/tech-talk/semiconductors/memory/a-qa-with-micron-technologys-memory-mastermind

    We have to ask what solution we are looking for, and then design memory solutions to enable those. We are extending DRAM and NAND in terms of usefulness and performance and cost scaling. And 3D XPoint is an example that was designed for specific system level solution.

    Reply
  31. Tomi Engdahl says:

    TSMC sees modest fourth quarter revenue growth, shrugs off trade war impact´
    https://www.reuters.com/article/us-tsmc-results/tsmc-sees-modest-fourth-quarter-revenue-growth-shrugs-off-trade-war-impact-idUSKCN1MS0M4

    Taiwan Semiconductor Manufacturing Co (TSMC) (2330.TW) offered a modest fourth-quarter revenue growth outlook, predicting weaker sales of high-performance computers for cryptocurrency mining will partially offset solid demand for chips from smartphones.

    In a move likely to further consolidate TSMC’s technological leadership, key rival GlobalFoundries said recently that it would not compete in the latest generation of chipmaking technology that is hotly sought after by high-end device makers.

    “Despite the current market uncertainties, our business will benefit from a continued steep ramp (up) of 7 nanometre for several high-end smartphones,”

    Reply
  32. Tomi Engdahl says:

    Looking For The Next Big Innovation
    https://semiengineering.com/looking-for-the-next-big-innovation/

    AI is challenging the entire design ecosystem in new ways.

    Reply
  33. Tomi Engdahl says:

    Variation At 10/7nm
    Why the middle of line is now a major problem.
    https://semiengineering.com/variation-at-10-7nm/

    why variability is a growing challenge at advanced nodes

    Reply
  34. Tomi Engdahl says:

    Machine Learning Invades IC Production
    https://semiengineering.com/machine-learning-invades-ic-production/

    Experts at the Table, part 1: Will machine learning and AI improve chip manufacturing?

    Reply
  35. Tomi Engdahl says:

    Can Graphene Be Mass Manufactured?
    https://semiengineering.com/can-graphene-be-mass-manufactured/

    Numerous questions surface about whether 2D materials are the best choice for extreme scaling, and so far there are few answers.

    Reply
  36. Tomi Engdahl says:

    Wanted: Mask Equipment for Mature Nodes
    https://semiengineering.com/wanted-mask-tools-for-mature-nodes/

    Shortfall caused by demand spike for analog, MEMS and RF chips.

    Rising demand for chips at mature nodes is impacting the photomask supply chain, causing huge demand for trailing-edge masks and a shortfall of older mask equipment.

    The big issue is the equipment shortfall, which could impact customers on several fronts. Tool shortages could lead to longer mask turnaround times and delivery schedules for chips being developed at 90nm and above, which are built in 200mm fabs. It also could impact chips at legacy nodes in 300mm fabs.

    In response, many photomask equipment vendors have developed or are working on tools for mature nodes to meet demand, but it’s unclear if the industry can respond in time. It’s also hard to predict how long the boom cycle will last for mature nodes.

    Reply
  37. Tomi Engdahl says:

    An overview of radiated
    EMI specifications for
    power supplies
    http://www.ti.com/lit/wp/slyy142/slyy142.pdf

    Reply
  38. Tomi Engdahl says:

    PCI Express 3.0 needs reliable timing design
    https://www.edn.com/design/pc-board/4461106/PCI-Express-3-0-needs-reliable-timing-design?utm_source=newsletter&utm_campaign=link&utm_medium=EDNPCBDesign-20181022

    PCI Express (PCIe) is an important standard for chip-to-chip communications and serves as a standard for connecting motherboards to peripheral cards. It can be challenging, however, to implement the reference clock so that it meets the various requirements of the PCIe standard. Designers need to consider frequency, jitter, output standard, and other characteristics. With an understanding of the different PCIe architectures, their individual reference clock requirements, and how clock devices can help meet the various PCIe reference clock requirements, developers can design reliable systems.

    Reply
  39. Tomi Engdahl says:

    A Crisis In DoD’s Trusted Foundry Program?
    https://semiengineering.com/a-crisis-in-dods-trusted-foundry-program/

    GlobalFoundries’ decision to put 7nm on hold is raising concerns across the mil/aero industry.

    The U.S. Department of Defense’s Trusted Foundry program is in flux due to GlobalFoundries’ recent decision to put 7nm on hold, raising national security concerns across the U.S. defense community.

    U.S. DoD and military/aerospace chip customers currently have access to U.S.-based “secure” foundry capacity down to 14nm, but that’s where it ends. No other foundries provide similar “secure” foundry capacity beyond that in the U.S. right now, leaving the U.S. defense industry at a potential technological disadvantage across the globe.

    The defense community uses a multitude of fabs to make chips for their systems.

    Reply
  40. Tomi Engdahl says:

    Serious talent shortage posing challenges for China IC development
    https://www.digitimes.com/news/a20181022PD207.html

    Despite China’s semiconductor industry aggressively carrying out diverse development projects, increasingly serious talent shortage is casting clouds over the development, making it a pressing issue for IC players in the country to introduce talent from abroad, especially amid the escalating US-China trade conflicts, according to industry sources.

    Wang Zhihua, deputy dean of the Institute of Microelectronics at Tsinghua University, estimated that if China’s semiconductor wants to realize the production value of CNY1 trillion (US$144.27 billion) by 2020, a total of 700,000 employees are needed to support the production if based on the per capita output value of CNY1.4 million a year, compared to the current workforce of only 300,000.

    Reply
  41. Tomi Engdahl says:

    Silicon Wafers: Tight Supply, High Prices
    How long will the shortages last?
    https://semiengineering.com/silicon-wafers-tight-supply-high-prices/

    For years, the silicon wafer industry suffered from oversupply and depressed prices, causing considerable consolidation in the industry.

    Then, two or so years ago, the IC industry entered into a boom cycle. Silicon wafer vendors began to experience tight supply amid strong demand from IC makers. Some silicon wafer makers even raised their prices.

    Today, the silicon wafer market remains strong and supply is tight. In 2018, total wafer shipments are expected to eclipse the all-time market high set in 2017, according to SEMI. Polished and epitaxial silicon shipments are expected to reach 12,445 million square inches in 2018, up 7.1% over 2017, according to SEMI.

    “As new greenfield fab projects continue to emerge for memory and foundry, silicon shipments are expected to remain strong for 2019 and through 2021,” said Clark Tseng, an analyst at SEMI.

    Reply
  42. Tomi Engdahl says:

    US and EU 62368-1 dates harmonized: Ready to transition?
    https://www.edn.com/electronics-blogs/power-forward/4461208/US-and-EU-62368-1-dates-harmonized–Ready-to-transition-?utm_source=newsletter&utm_campaign=link&utm_medium=EDNConsumerElectronics-20181024

    Following the expected update to the EU Official Journal on June 15, and UL’s immediate response, the date for the new 62368-1 hazard-based safety standards to supersede the outgoing 60950-1 and 60065 standards is now harmonized in both the US and EU. The “Effective Date” associated with UL 62368-1 in the US, and the EU’s date have both now moved from June 20, 2019 to December 20, 2020. This coincides with the EU’s declared Date of Withdrawal for EN 60950-1 and EN 60065.

    This harmonization and solidification of dates should help OEMs coordinate measures to ensure that products destined for either market are compliant with the new regulations. It also gives companies an extra 18 months to comply. Other territories including China, Japan, Australia, and New Zealand are also in the process of changing to their own regional versions of IEC 62368-1.

    Although the IEC began developing 62368-1 to cover both ICT and AV equipment, because the distinctions between the two types have become increasingly blurred, it has stressed that the new unified standard is not a simple merger of the old standards. It takes a fundamentally different approach, founded on hazard-based safety engineering (HBSE) principles, and its scope – although initially the same as the two older standards – will be further extended in successive editions of the documentation.

    Understanding HBSE

    HBSE contrasts with the prescriptive approach that defines 60950-1 for ICT equipment and 60065 for AV equipment. Whereas these are focused on specifications, such as safety extra low voltage (SELV) limits for accessible assemblies, or minimum isolation voltages, HBSE seeks to ensure user safety by requiring design teams to demonstrate that potential hazards have been considered and suitable safeguards have been put in place.

    HBSE essentially consists of: (a) identifying energy sources in the product; (b) classifying the energy according to the potential for causing injury or damage; (c) identifying needed safeguards for protection from potentially dangerous energy sources; and (d) qualifying the safeguards as effective.

    Energy sources are classified according to both magnitude and duration, which are categorized into three classes as shown in table 2. As table 1 suggests, 62368-1 considers all sources of energy that may be present in an item of ICT or AV equipment, including electrical energy, thermal energy such as hot accessible parts, chemical energy such as electrolytic reactions or poisons, kinetic energy such as moving parts and radiated energy including optical or acoustic energy.

    Act now on Edition 2

    With the updating of the EU Official Journal in June of this year, manufacturers marketing products in the EU now know they must transition from EN 60065 or EN 60950-1 by December 20, 2020. Most likely, they will need to ensure compliance with 62368-1 Edition 2, which is the currently published version of the standard. This makes it imperative to start working with test houses as soon as possible, to avoid being caught out closer to the deadline when workloads are sure to be heavy.

    What we do know is that Edition 3 will extend the scope of 62368-1 to include equipment such as tablets, smartphones, 3D printers and wearable technology, as well as IEC 60950-21 rules on remote power feeding, which will affect Power Over Ethernet equipment. Rules on stored energy, outdoor enclosures, backfeeds and associated safeguards, requirements for insulating liquids and coin cells, and new demands on interconnected ES3, ES2 and ES1 circuits in SMPS secondaries will also be added.

    For now, it seems smart to commit to Edition 2 and work towards establishing compliance, while keeping abreast of developments with Edition 3

    IEC 62368-1
    An Introduction to the New Safety Standard for ICT and AV Equipment
    https://www.cui.com/catalog/resource/iec-62368-1-an-introduction-to-the-new-safety-standard-for-ict-and-av-equipment.pdf

    Reply
  43. Tomi Engdahl says:

    Unusual Conductive Properties of Bismuth Could Find Electronics Applications
    https://www.designnews.com/electronics-test/unusual-conductive-properties-bismuth-could-find-electronics-applications/199136417059548?ADTRK=UBM&elq_mid=6169&elq_cid=876648

    European scientists have discovered that thousands of materials—including bismuth—have the potential to replace silicon in advanced electronic and computing applications.

    Scientists are constantly searching for new materials called topological insulators, due to their unique ability to insulate on the inside but conduct electrical current on their surface. This property allows an electrical current to theoretically flow without resistance and respond in unconventional ways to electric and magnetic fields.

    Reply
  44. Tomi Engdahl says:

    Imec, ASML Team on Post-3nm Lithography
    https://www.eetimes.com/document.asp?doc_id=1333896

    Research organization Imec and lithography equipment manufacturer ASML plan to establish a joint research lab to explore printing nanoscale devices towards the post-3nm logic node.

    The collaboration is part of a new five-year program that builds on a near 30-year relationship between imec and ASML and will have two phases. The first is to develop and accelerate the adoption of EUV lithography for high-volume production, including the latest available equipment for EUV.

    The second phase will explore the potential of next-generation high-NA (numerical aperture) EUV lithography to enable printing of even smaller nanoscale devices advancing semiconductor scaling beyond 3nm.

    As part of the first phase, the new lab will install ASML’s NXE:3400B high-volume production dedicated EUV scanner in Imec’s cleanroom by the end of this year and will look to evolve and improve the current 0.33 NA EUV lithography technology.

    The NXE:3400B EUV system, with its 250W light source, provides a throughput of more than 125 wafers per hour, an important requirement for high-volume production.

    ASML bills the EXE:5000, which will be ready by 2021, as its new next generation EUV lithography platform.

    Reply
  45. Tomi Engdahl says:

    EUV’s Uncertain Future
    https://semiengineering.com/euvs-uncertain-future/

    Litho tech has finally arrived after years of delays and billions of dollars in investments. Now the question is who still needs it.

    The ground appears to be solidifying under EUV. Intel announced this week it is reducing its stake in ASML to less than 3%, the second such move in a year. Apparently ASML no longer needs outside help.

    That success follows a long, twisty, and painfully slow development path. EUV is a marvel of engineering and scientific achievement that has been under development for decades. It was first expected to be used somewhere around 45nm (there was even talk of rolling it out at 65nm), which would have sidestepped the need for both immersion lithography and multi-patterning. But just as it appeared that the technology was making real progress—and as multi-patterning was becoming really difficult for Metal 0 and Metal 1—ASML began struggling.

    Reply

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