DIY logic analyzers

In Internet there seems to be many plans for DIY logic analyzers:
Open source logic analyzer
OpenBench Logic Sniffer
Openbench Logic Sniffer
SUMP FPGA Based Logic Analyzer
FLASH – PLAICE: Programmer, Logic Analyzer and In-Circuit Emulator Project
A logic analyzer using the PC’s parallel port
A logic analyzer using the PC’s parallel port
MiniLA – logic analyzer SW & HW
The “Sump” Logic Analyzer (video demo)
Prototype: Openbench Logic Sniffer logic analyzer

There seems to be many open hardware projects, but what is lacking is good software for them. Some logic analyzer use SUMP PC Client and there is also Java Logic Analyzer Client project (jlac).

I would like to see on this Open Source world is some kind of common format logic analyzer data presentation and maybe common API for accessing the information. In this way it would be easy to write all kinds of applications that decode data and hardware that captures the data independently. It would be easy to integrate different things easily. This would benefit everyone. I would want something like what Wireshark did for network traffic analyzing.

First I though maybe I need to start some of my own code to start this if there is nothing else. For presenting logic data with timestamps one format that come to my mind was Comtrade. Comtrade is a standard for common format for electric power systems transient data exchange. It allows storing many channels of time stamped analogue and digital data. The data is normally in CSV format, so it would be easy to use. There are some standard sample rates but maybe we could use also other rates. Time stamping work at least to microsecond resolution. There are many Comtrade viewing programs, both free and commercial.

Another project that looked interesting was Comedi. The Comedi project develops open-source drivers, tools, and libraries for data acquisition. Comedi is a free software project that develops drivers, tools, and libraries for various forms of data acquisition: reading and writing of analog signals; reading and writing of digital inputs/outputs; pulse and frequency counting; pulse generation; reading encoders; etc. Comedi is a collection of drivers for a variety of common data acquisition plug-in boards in Linux.

I did not go to the trouble of writing my own code for a while. Then about half year ago I saw announcement of Sigrok: An Open Source Logic Analyzer. The sigrok project aims at creating a portable, cross-platform, Free/Libre/Open-Source signal analysis software suite (client) that supports various device types. This was what I was thinking of the end results should be. I start to follow how this project will succeed in their aims. Looks interesting at this point.


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  2. Tomi Engdahl says:

    Turning the Stellaris Launchpad into a logic analyzer

    If you have a Stellaris Launchpad sitting around, have a go at using it as a logic analyzer

    This build turns the Launchpad into a 10 MHz, 8-channel logic analyzer with a 16 kB buffer comparable with just about every piece of software thanks to the SUMP protocol.

  3. Open Logic Sniffer software and hardware « Tomi Engdahl’s ePanorama blog says:

    [...] (I have not yet tested it with real hardware). The software seem to be considerably getter than some other free logic analyzer software I have checked over years. Logic Sniffer Java client is worth to check out if you are looking for [...]

  4. Tomi Engdahl says:

    Comtrade (IEEE Std C37.111-1999) is a common format for electric power systems transient data exchange. It allows storing many channels of time stamped analogue and digital data.

    The time stamp has a base unit of microseconds. The elapsed time from the Þrst data sample in a data Þle to the sample marked by any time stamp Þeld in that data Þle is the product of the time stamp for that data sample and the time multiplier in the confguration file (timestamp ´ * timemult).

    timemult is the multiplication factor for the time differential (timestamp). It is real numeric value. Typically it is integer (for example 1000 for timestamps in milliseconds).

    That timemult can also be in standard floating point notation, meaning more accurate than microsecond time stamps are possible (for example nanoseconds with value 0.001)

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  6. Tomi Engdahl says:

    ProduinoCY7C68013A-56 USB Logic Analyzer Development Board for Arduino – Blue + Black

    CY7C68013A-56 chipset: Low-power version; Enhanced 51-core; 16KB program data areas; 48MHz frequency

    All GPIO are lead out through 2.4mm pin header
    Achieve logic analyzer functions with certain firmware

  7. Tomi Engdahl says:

    Quite interesting hack:

    Turning An Analog Scope Into A Logic Analyzer

  8. Tomi Engdahl says:

    mishmash1 – sdramThing3.0 Logic Analyzer

    An AVR, a 128MB SDRAM DIMM, an old laptop LCD, and 3 TTL chips make for a 16MS/s multi-channel logic-analyzer interface for an analog ‘scope

  9. Tomi Engdahl says:

    SDRAM Logic Analyzer Uses An AVR And A Dirty Trick

    We often see “logic analyzer” projects which are little more than microcontrollers reading data as fast as they can, sending it to a PC, and then plotting the results. Depending on how fast the microcontroller is, these projects range from adequate to not very useful.

    At first glance, [esot.eric’s] logic analyzer project has an AVR in it, so it ought to be on the low end of the scale. Then you look at the specs: 32 channels at 30 megasamples per second. How does that work with an AVR in it?

    The answer lies in the selection of components. The analyzer uses a 128MB SDRAM DIMM (like an older PC might use for main memory). That makes sense; the Arduino can’t store much data internally. However, it isn’t the storage capacity that makes this choice critical. It seems [esot.eric] has a way to make the RAM “free run”.

    The idea is to use the Arduino (or other host microcontroller) to set up the memory. Some of the memory’s output bits feedback to the address and data lines. Then the microcontroller steps aside and the SDRAM clocks samples into its memory by itself at the prevailing clock rate for the memory.

    sdramThing4.5 “Logic Analyzer”

    An AVR, 128MB SDRAM DIMM, old laptop LCD, and a handful of TTL chips — 30+MS/s 32-channel logic-analyzer interface for an analog ‘scope

    sdramThing4.5 makes it possible to free-run the SDRAM at speeds far-greater than the processor (looking toward 133MHz!).
    Once it’s loaded with the initial set of commands, it can be physically disconnected from the MCU and continue doing its thing.

    This sample/repeat process is made-possible by sdramThing’s “Free-Running” mode. This mode takes advantage of the SDRAM’s synchronous nature to allow it to control itself.

    It’s entirely plausible, with a bit of work, to get sampling up to (and exceeding) the SDRAM’s rated clock-speed of 133MHz (133MS/s). But currently, I’ll be happy to get it working at 40MS/s, as my attempts at decoupling the SDRAM clock from the AVR clock have been slow-in-progress.


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