Transistors Will Stop Shrinking in 2021, Moore’s Law Roadmap Predicts – IEEE Spectrum


  1. Tomi Engdahl says:

    The current development of integrated circuits terminated in 2024

    IRDS or International Roadmap for Devices and Systems have called IEEE Circuits report drawn up by the development of the road, or roadmap. The organization plans to announce the first official IRDS report next November. It is, however, trickled preliminary data, for example in the form of technical documents. According to them, the current circuits and the development of a smaller scale of the ends around the year 2024.

    The forecast would mean in practice that Moore’s Law would cease to exist. The reason for this is the interaction of the physical structures of circuits so small that a smaller scale a silicon-based chips, no longer possible.

    There are currently going through the first 11 or 10-nanometer steps in logic circuits. In 2019, the process is changed to 8 or 7 nm, and in 2024 already four or three nanometers. In this case, the logic circuitry transistor gate of the physical width is only 10 nanometers, when it is at the moment the most advanced circles is 24 nanometers.

    In practice, the circuit connections will three or four nanometers so small that the parasitic phenomena prevent their reliable operation.

    Development does not mean the end of the electronics. Instead of silicon, and the end of the era of CMOS process, it means yes.


    IRDS Reports

  2. Tomi Engdahl says:

    Time For New Rules
    Trying to fit everything into a discussion about Moore’s Law is getting ridiculous.

    Is Moore’s Law dead? Brigadier General Paul Fredenburgh, commandant of the Dwight D. Eisenhower School for National Security and Resource Strategy, asked that question to four industry CEOs last week while visiting Silicon Valley with some of his students. He received four highly nuanced, if not different, answers.

    From one perspective or another, all of the CEOs were all correct. It’s taking longer to move from one process node to the next, but there is significantly more compute power being offered at each new node. While that isn’t technically a doubling of transistors every two years or so, performance continues to increase an average of 30% every couple of years, either through architectural changes, new materials or different packaging approaches.

    Moreover, there is no end in sight to how long this will continue. 2.5D, fan-out wafer-level packaging and full 3D will radically improve performance and lower power.

    What is becoming obvious, though, is that Moore’s Law as it was originally written is getting tougher to follow. There are several reasons for this:

    1. Quality is becoming a bigger issue as semiconductors begin making inroads in safety-critical and industrial markets, including autonomous vehicles, robotics and personalized medicine.

    2. Market demand for moving to the next process node will continue, but the number of high-volume markets is shrinking. Companies such as Samsung, Intel and Xilinx all need increased transistor density. But for other companies, density isn’t the only way to solve their power/performance/cost issues.

    3. Despite the fact that EUV is moving forward after years of delays, the big challenge with advanced nodes is time. EUV will help. But that’s only one piece of the puzzle. It takes longer to design chips at advanced nodes

    While Moore’s Law is continuing in one way, it also has ended in another. And while collectively this is referred to as Moore’s Law, it bears only glimmers of resemblance to the observation first penned by Gordon Moore.


Leave a Comment

Your email address will not be published. Required fields are marked *