Electronics trends for 2017

 

Chip Market Brightens in 2017. The semiconductor industry may yet have been flat in 2016, but expects it is expected that the electronics industry rebounds in 2017, probably in the first half. Wall Streeter predicts return to 5% growth. Total IC business growth is expected to be around five percents for few years to come.There seems to several promises to this direction, especially in memory business. Chips Execs See Maturing Industry article says that pessimism about immediate revenue and R&D growth is a sign of a maturing industry.

Thanks to both rising prices and volume sales, the memory sector is expected to lead overall semiconductor sales growth. Sales of memory chips will increase 10% next year to a new record high of $85.3 billion, according to the latest report from IC Insights. NAND flash will grow almost as fast at 10% next year. The average annual growth rate for the memory market is forecast to be 7.3% from 2016-2021. Every year we need 5.6% more bits than previous year, and the unit prices are increasing on both DRAM and Flash.

There will be also other growth sectors. The data center will be the fastest growth segment next year, rising 10%, followed by automotive at 9% and communications at 7%Consumer and industrial markets growing at about 4% in line with the overall industry. PCs will be the big drag on 2017, declining 2%.

China Dominates Planned Chip Fabs as more than 40% of front end semiconductor fabs scheduled to begin operation between 2017 and 2020 are in China, a clear indication that China’s long-stated ambition to build a significant domestic semiconductor industry is taking shape.

Trump Win Could Mean Big Questions for Manufacturing as while Trump vowed to keep American manufacturing jobs, he offered little in the way of stated policy other than the promise to punish companies that sent manufacturing job outside the US. Questions about trade also could directly affect US manufacturing. How that plays out is a big unknown.

Europe will try to advance chip manufacturing, but not much results in 2017 as currently  there is almost no leading-edge digital chip manufacturing left in Europe as the local companies have embraced outsourcing of digital semiconductor manufacturing to foundries. The European Commission intends to reconvene a high-level group of European CEOs and executives to exchange views on Europe’s 10/100/20 nanoelectronics and chip manufacturing project and make adjustments as necessary for a wave of European Union investment supposedly starting in 2020. The two most advanced wafer fab locations left in Europe in terms of deep sub-micron miniaturization belong to Intel in Leixlip, Ireland and Globalfoundries in Dresden, Germany.

Smaller geometries are to be taken into use and researched in 2017. Several chipmakers ramp up their 10nm finFET processes, with 7nm just around the corner. As TSMC, GF/Samsung Battle at 7nm the net result is in the course of 18 months chip designers will see at least three variants of 7nm — separate immersion variants from TSMC and Globalfoundries and the EUV version from GF/Samsung. Intel has yet to detail its 7nm node.

At the same time R&D has begun for 5nm and beyond, but Uncertainty Grows For 5nm, 3nm as costs are skyrocketing. Both 5nm and 3nm present a multitude of unknowns and challenges. To put this in perspective, there are roughly two silicon atoms in 1nm of line width in a chip. Etching Technology Advances as atomic layer etch (ALE) moves to the forefront of chip-making technology—finally. TSMC recently announced plans to build a new fab in Taiwan at a cost of $15.7 billion targeted for TSMC’s 5nm and 3nm processes, which are due out in 2020 and 2022.

Moore’s Law continues to slow as process complexities and costs escalate at each node. Moore’s Law is dead, just not in the way everyone thinks. SiFive believes open source hardware is the way forward for the semiconductor industry.  Technological advances keep allowing chips to scale, but the economics are another story – particularly for smaller companies that can’t afford chips in the volumes. The solution, according to San Francisco-based startup, SiFive, is open-source hardware, specifically an architecture developed by the company’s founders called RISC-V (pronounced “risk-five”). Done right SiFive, which was awarded Startup of the Year at the 2016 Creativity in Electronics (ACE) Awards, believes that RISC-V will do for the hardware industry what Linux has done for software. For example 5th RISC-V Workshop Points to Growing Interest in the RISC-V Platform.

Sensors are hot in 2017. These tiny, powerful solutions are creating the interface between the analog and the digital world. Data is everywhere, and sensors are at the very heart of that. While no one really knows what technology’s next “killer application” will be, we are confident that any killer app will rely on sensors.Appliance autonomy promises to make life simpler, but this field has still lots of to improve even after year 2017.

Interface ICs will continue to help simplify high-bandwidth designs while making them more robust and reliable. Application areas that will benefit include automotive, communications, and industrial. Both wired and wireless interface solutions have plenty of applications.

Analog’s status is rising as more sensors and actuators are added into electronic devices, pressure is growing to more seamlessly move data seamlessly back and forth between analog and digital circuitry. IoT pushes up demand for analog content and need for communication between these two worlds will continue to grow. Analog and digital always have fit rather uncomfortably together, and that discomfort has grown as SoCs are built using smaller feature sizes.  The demand for analog silicon has always existed in the embedded space, but the advent of the Internet of Things (IoT) is increasing the demand for connected mixed-signal contentAt 28nm and 16/14nm, standard “analog” IP includes a fair amount of digital content.

It seems that hardware designer is a disappearing resource and software is the king in 2017. It is becoming less and less relevant in what format the device is used in many applications. Card computers are standard products and are found in many different card formats that can be used in very many applications. Embedded development is changing to more and more coding. More software designers that understand some hardware are needed, but it is not easy to leap to move to the hardware to software.

The power electronics market is moving at very fast pace. Besides traditional industrial, renewable, and traction sectors, new applications such as energy-storage systems, micro-grids, and dc chargers are emerging. As the automotive world moves to electric vehicles, this creates challenges for IGBT and SiC-MOSFET ICs, and their associated gate drivers. New packages for high-voltage IGBTs and high-voltage SiC-MOSFETs are introduced.

More custom power distribution  and higher voltages on data center computer systems in 2017. OpenRack and OpenCompute projects are increasing the distribution voltage inside the server itself.  This approach, plus transitioning to new materials such as gallium nitride in the power-conversion systems, can reduce overall power consumption by 20% and increase server densities by 30-40%.”

Power Modules and Reference Designs will be looked at in 2017 even more than earlier in power electronics. The semiconductor and packaging technologies used in power modules have advanced considerably, and the industry is developing modules today that are denser, less expensive, and easier to use. Designers want to rely on power modules to speed up designs and optimize space using smaller, easy-to-use power modules. Module manufacturers hope that  engineers will increasingly choose a module over a discrete design in many applications.

The bi-directional DC/DC converter has been around for a while, but new applications are quickly emerging which necessitate the use of this architecture in so many more systems. Battery back-up systems need bi-directional DC/DC converters. Applications today require better energy efficiency and such systems as green power with solar or wind generation, need storage so that when there is no wind or sun available the electricity flow is not interrupted.

Power supplies need to become more efficient. Both European Union’s (EU) Code of Conduct (CoC) Tier 1 and CoC Tier 2 efficiency standards are to be taken into use. The European Union’s CoC Tier 1 effectively harmonizes the EU with US DoE Level VI and became effective as a voluntary requirement from January 2014, two years ahead of Level VI. Its adoption as an EU Ecodesign rule is currently under review to become law with an implementation date of January 2017. The key difference between the CoC requirements and Level VI is the new 10% load measure, which imposes efficiency requirements under a low-load condition where historically most types of power supplies have been notoriously inefficient. CoC Tier 2 further tightens the no-load and active mode power consumption limits.

During 2016, wireless-power applications started to pick up across many fields in the semiconductor industry, and it will continue to do so. Wireless power will continue to gain traction with increased consumer demand.  Hewlett Packard, Dell, jjPlus, and Witricity have already announced products based on Airfuel standards. And, products based upon the Qi standard will continue to grow at a rapid pace.

 

Other prediction articles:

In Power & Analog 2017 Forecast: What Experts Are Saying article representatives from major players in the semiconductor industry share their predictions for 2017 regarding power modules, wireless power, data converters, wireless sensing, and more.

Looking Ahead to 2017 article tells on to what SIA is focused on working with. “U.S. semiconductor technology should be viewed as a strategic national asset, and the Administration should take a holistic approach in adopting policies to strengthen this vital sector,” the letter says

Hot technologies: Looking ahead to 2017 article collection has EDN and EE Times editors explore some of the hot technologies in 2017 that will shape next year’s technology trends and beyond.

 

942 Comments

  1. Tomi Engdahl says:

    Generically Reusable IP No One Uses
    https://semiengineering.com/generically-reusable-ip-no-one-uses/

    If we just keep putting generically reusable on the box, all we’re doing is selling our colleagues a generically reusable piece of garbage.

    Tommy decides the best course of action is to hit the road as traveling salesman. Accompanied by his sidekick Richard, Tommy stumbles repeatedly through meetings, having zero success, at one point even starting a model car on fire, until he finally nails his pitch and makes his first sale. The fella he’s talking to puts up a strong front, insisting that he can’t sell brake pads that don’t come with a guarantee; that just having the word guarantee on the box helps customers sleep at night. Tommy counters with the argument that a guarantee means nothing without quality. It’s enough to close his first deal.

    If you’re looking for two words that match the significance of the word ‘guarantee’ in functional verification, look no further than ‘reusable’ and ‘generic’. Those are the two words we put on the box to help our colleagues – managers included – sleep at night.

    To me, calling your own code generic or reusable is kind of like giving yourself a nickname. That’s a major faux-pas where I come from.

    To me, code has to hit several criteria in order to be declared reusable…

    Your code has been used once
    Your code has been used two or more times
    Your code has been used by someone other than you
    That other person didn’t need you to use your code for them

    OK… so the first bullet is more a prerequisite than a requirement, and I can’t believe it’s something we’d even need to point out, but unfortunately it’s where we start. Calling code reusable before anyone has used it, not even you, is putting the cart before the horse. Way before! Yet I’d guess this is the 2nd most typical situation when it comes to people calling code reusable; they set out to solve a problem common to many colleagues, write the code accordingly, wait for the masses to flock to it, the masses don’t flock to it, the code rusts in the repository and is eventually deleted to recoup storage space. Without ‘use’, there can be no ‘reuse’.

    Reply
  2. Tomi Engdahl says:

    Getting A Standard Right The First Time
    https://semiengineering.com/getting-a-standard-right-the-first-time/

    Is the Accellera Portable Stimulus Standard ready to be released? What are the pros and cons?

    The development of standards is a tricky balance, especially when going into areas that are nascent. The Portable Stimulus Standard (PSS), being developed within Accellera is one of those.

    This could be the most important standard since Verilog and VHDL. And if there ever was something that deserved the title of disruptive, this is it.

    The development of standards is a tricky balance, especially when going into areas that are nascent. The Portable Stimulus Standard (PSS), being developed within Accellera is one of those.

    This could be the most important standard since Verilog and VHDL. And if there ever was something that deserved the title of disruptive, this is it.

    It is the first standard that increases the abstraction of the verification process and at the same time redefines verification correctly. We have existed, and admittedly done quite well, with a verification methodology that was built upon a very shaky infrastructure. It concentrated on stimulus, rather than checking and closure based on observation rather than intent.

    Portable Stimulus Working Group
    Standards for portable test and stimulus
    https://semiengineering.com/kc/entity.php?eid=22863

    Reply
  3. Tomi Engdahl says:

    Prototypes Proliferate
    What will it take to make hardware prototyping as ubiquitous as emulation?
    https://semiengineering.com/prototypes-proliferate/

    Reply
  4. Tomi Engdahl says:

    Monthly Chip Sales Hit $35 Billion for First Time
    https://www.eetimes.com/document.asp?doc_id=1332396&

    Monthly semiconductor sales hit $35 billion for the first time in August, increasing on a sequential basis for the 13th consecutive month, according to the Semiconductor Industry Association (SIA).

    The three-month moving average of chip sales increased by 4 percent sequentially and 24 percent year-to-year in August, as the semiconductor sales rally that began in the second half of 2016 continues to steam along, according to the SIA. The industry association reports sales figures compiled by the World Semiconductor Trade Statistics organization, a group of 55 semiconductor firms that provide sales data on a monthly basis.

    “Sales in August increased across the board, with every major regional market and semiconductor product category posting gains on a month-to-month and year-to-year basis,” said John Neuffer, SIA president and CEO, in a press statement. “Memory products continue be a major driver of overall market growth, but sales were up even without memory in August.”

    Led by strong sales of memory chips, the semiconductor industry is enjoying its strongest growth year since at least 2010.

    Reply
  5. Tomi Engdahl says:

    Making Energy-Efficient ICs Energy Efficiently
    https://www.eetimes.com/author.asp?section_id=36&doc_id=1332369&

    Semiconductor manufacturers are able to make an increasingly important contribution to ensuring that end products use the minimal amount of energy and are efficient.

    There is significant global focus on energy efficiency, and we are all encouraged to use less energy and make energy-efficient choices, whether it be a new washing machine or considering the overall energy efficiency of the buildings in which we live and work.

    Semiconductor manufacturers are able to make an increasingly important contribution to ensuring that end products from cars to vacuum cleaners and laptops to factory automation equipment use the minimal amount of energy and are efficient. Indeed, ON Semiconductor’s mantra is “energy-efficient innovations.”

    To put it in perspective, worldwide energy consumption was over 20 petawatt-hours (PWh) in 2015; that’s equivalent to $2.4 trillion. Of the energy consumed, around 50 percent was by electric-motor-driven systems, which are, in turn, controlled, managed and regulated by semiconductor devices.

    Our increasingly “electrified” world means that, despite all of the products we use becoming more efficient, the net requirement for power is still on the increase; in fact, some estimates suggest that demand will have grown by 55 percent between 2005 and 2030.

    Electronics technology in general — and, most notably, semiconductors — have been a great enabler in recent years for making existing iterations of everything from notebook computers to washing machines more frugal when it comes to their power requirements and, in so doing, placing less demand on the grid and, therefore, power generation itself.

    But it mustn’t be overlooked that the actual process of making semiconductors can be extremely resource-hungry.

    Reply
  6. Tomi Engdahl says:

    NAND Market Expected to Regain Balance in 2018
    https://www.eetimes.com/document.asp?doc_id=1332397&

    The NAND flash market is expected to move into better equilibrium in 2018 as the production of NAND ramps up to meet demand, according to DRAMeXchange, a market research firm that tracks memory chip price.

    Demand has exceeded supply in NAND for sixth consecutive quarters since the third quarter of 2016. According to DRAMeXchange, demand for NAND has continued to increase through 2017 due to a strong server market and the increasing memory content in smartphones. Meanwhile, supply has been constrained by NAND flash markers technology migrations, principally to 3D NAND.

    However, DRAMeXchange predicts that NAND flash bit growth will be about 43 percent in 2018, while bit demand growth is projected to be about 38 percent.

    According to Alan Chen, senior research manager at DRAMeXchange, NAND suppliers other than market leader Samsung Electronics have experienced losses of production capacity as they moved to improve their 3D NAND production processes. “At the same time, suppliers have been unable to effectively utilize the additional capacity that they have taken on,” Chen said, in a press statement.

    Reply
  7. Tomi Engdahl says:

    TSMC Chairman Morris Chang Announces Retirement
    https://www.eetimes.com/document.asp?doc_id=1332390&

    Taiwan Semiconductor Manufacturing Co. (TSMC) Chairman Morris Chang has announced his retirement from the company in June next year. He will turn over leadership to the current co-CEOs.

    Chang, who is 86 this year, is a semiconductor industry veteran who rose to the top management of Texas Instruments and General Instruments Corp. before he was recruited by the Taiwan government to become chairman of the Industrial Technology Research Institute, an organization that helped to spin off a number of Taiwan’s largest chip companies.

    Reply
  8. Tomi Engdahl says:

    TI Riding mmWave Sensors
    https://www.eetimes.com/document.asp?doc_id=1332387&

    Texas Instruments, which entered the radar sensor market only four months ago, is late to a party that includes heavyweights NXP Semiconductors, Infineon Technologies and STMicroelectronics, but nonetheless exudes confidence in its ability to gain market share.

    Last month, EE Times caught up with Sameer Wasson, general manager of radar & analytic processors at TI to get a progress report. While acknowledging that automotive is the biggest market for radar chips, he noted that he is actually more excited about potential applications for TI’s radar chips. “Drones, factory floors and building automation… you name it. There are so many places our chips can go,” he said.

    TI professes to be all in with mmWave sensors, whose possible applications go well beyond Wasson’s list.

    Reply
  9. Tomi Engdahl says:

    TSMC Aims to Build World’s First 3-nm Fab
    https://www.eetimes.com/document.asp?doc_id=1332388&

    Taiwan Semiconductor Manufacturing Co. (TSMC) will build the world’s first 3-nm fab in the Tainan Science Park in southern Taiwan, where the company does the bulk of its manufacturing.

    The announcement lays to rest speculation that the company might build its next chip facility in the U.S., attracted by incentives offered by the administration of President Donald Trump to bring more manufacturing to America.

    About a year ago, TSMC said it planned to build its next fab at the 5-nm to 3-nm technology node as early as 2022. The more recent one-paragraph announcement from TSMC on Sept. 29 didn’t provide a timeframe for the opening of the 3-nm fab.

    “TSMC recognizes and is grateful for the (Taiwan) government’s clear commitments to resolve any issues, including land, water, electricity and environmental protection,” the statement said.

    Reply
  10. Tomi Engdahl says:

    Will You Have Lithium or Magnesium with Your Battery?
    http://www.electronicdesign.com/power/will-you-have-lithium-or-magnesium-your-battery?NL=ED-003&Issue=ED-003_20171002_ED-003_235&sfvc4enews=42&cl=article_2_b&utm_rid=CPG05000002750211&utm_campaign=13320&utm_medium=email&elq2=3bc0578f57254a1eace2252891ee34d4

    By developing a way to infuse magnesium, as well as a viable cathode structure plus electrolyte, it could lead to a safer alternative to lithium-based battery chemistry.

    Lithium-based cells are the chemistry of choice for many battery applications due to their favorable power/weight and power/volume ratios, but also have a drawback with the well-known risks of fire and even explosion. Another element, magnesium is a potential alternative, but it has issues with its cathode’s performance and electrolyte efficiency.

    Now, a joint team from three universities and three national laboratories, led by researchers at the University of Houston, reports they have developed a magnesium-based cathode design that counters conventional wisdom about the critical magnesium-chloride bonds. The results were reported in Nature Communications (the posted abstract includes a read-only link to the full paper). The new battery has storage capacity of 400 mA-hr/gm, as opposed to the 100 mA-hr/gm for earlier magnesium batteries.

    Reply
  11. Tomi Engdahl says:

    The Technology Revolution in Solid-State Switching Relays
    http://www.electronicdesign.com/analog/technology-revolution-solid-state-switching-relays?NL=ED-003&Issue=ED-003_20171002_ED-003_235&sfvc4enews=42&cl=article_1_b&utm_rid=CPG05000002750211&utm_campaign=13320&utm_medium=email&elq2=3bc0578f57254a1eace2252891ee34d4

    Evolving from magnetic coil actuators to capacitive-coupled isolation, the ever-shrinking relay continues to be an essential component within the automation arena.

    When comparing performance advantages of solid-state-relay (SSR) technology, one quickly realizes that these devices are not created equal. Optical MOSFET-based relays such as PhotoMOS have highly linear input and output characteristics that outshine alternatives such as triacs or optocouplers (Fig. 2). These SSRs with MOSFET output chips can also control small analog signals without distortion.

    SSRs that use output chips such as triacs or bipolar transistors have offset voltages that distort and clip signals.

    To turn on the relay, a current is applied to the LED on the input side, which will illuminate. The light is then absorbed by the photoelectric element that converts the light to electric power, similar to a solar cell. This electrical current subsequently passes through a control circuit and charges the gates of the two MOSFETs on the output side

    Taking this technology one step further is a capacitive-coupled relay, such as the Panasonic CC TSON (Fig. 4), which employs a control method that differs from the long-established LED-operated MOSFET relays. In this device, the LED from the input side has been replaced with a capacitive-coupling driver IC
    This allows the relay to be voltage-driven rather than current-driven.
    oscillated signal is then passed through a capacitor, which provides isolation between input and output.

    Removing the LED from the input side relieves some of the design limitations previously encountered by MOSFET relays—specifically, the LED takes up a lot of space

    Since temperature has a direct impact on the LED character, another advantage of removing the LED from the relay is the ability to withstand industrial ambient operating temperatures.

    In I/O modules for safety PLC devices, the ability to withstand high industrial temperature and small size can be crucial.

    As long as circuit design has the need to automate switching with electrical isolation, relays will continue to remain integral components. The evolution of relays has gone from using magnetic coil actuators, to LEDs that are used to drive triacs or MOSFETS, to the recent development of capacitive-coupled isolation.

    Reply
  12. Tomi Engdahl says:

    Current white LEDs are made of gallium nitride coated with phosphor to produce white color. Swedish and Danish researchers have now succeeded in developing white lead silicon carbide. It is longer lasting and produces a cleaner white light.

    White ledi was difficult to manufacture for a long time. The solution found was awarded the Nobel Prize in Physics in 2014. Through Phosphorus, however, the component speaks of bluish light that many feel unnatural. In addition, the phosphorus decreases with age, so the white becomes slightly blueer.

    Researchers from the Danish Technical University and the Swedish University of Linköping have now succeeded in building a white led silicon carbide. It has many advantages over existing white lenses.

    First, silicon carbide will withstand higher temperatures. The predicted lifetime of silicon carbide is up to 35 years without changing the color temperature of the light. In addition, rare metals are not required for the manufacture of these components.

    Source: http://www.etn.fi/index.php/13-news/6933-laepimurto-valkoisen-ledin-ongelma-ratkaistu

    Reply
  13. Tomi Engdahl says:

    Seth Archer / Business Insider:
    AMD announces Embedded Radeon E9170 Series GPU for low power systems that need to drive up to five 4K displays, like retail signage; stock rises over 5%

    AMD is popping after releasing its newest low-power chip (AMD)
    http://markets.businessinsider.com/news/stocks/amd-stock-price-popping-after-releasing-its-newest-low-power-chip-2017-10-1002952133

    AMD released a new embedded graphics processing unit on Tuesday, and the stock is trading 4.80% higher at $13.32 after the news.

    The company announced on Tuesday that its newest chip based on the Polaris architecture will be launched later this month. The chip, the Embedded Radeon E9170 Series GPU, is designed for smaller, dedicated systems that need an added graphics kick.

    Example uses for the new chipset include casino games, medical displays and retail signage, according to the company. The chip has the ability to drive five simultaneous 4k displays with relatively low power consumption, which could be helpful for applications like big retail displays.

    Reply
  14. Tomi Engdahl says:

    Go Configure Design Challenge Series
    DESIGN AND SAMPLE A CHIP IN HOURS
    http://efabless.com/silego/

    Design a mixed signal IC in a matter of hours with Silego GreenPAK configurable chip technology
    Compete in the Go Configure Design Challenge Series for over $15,000 in prizes!
    Learn about the rules and prizes here.
    Get started today

    https://efabless.com/silego-challenge-series/

    Reply
  15. Tomi Engdahl says:

    Prototyping Building Blocks
    How putting together LEGOs is like building an SoC.
    https://semiengineering.com/prototyping-building-blocks/

    Lego has existed for 85 years. The company was founded August 10, 1932, and after all these years, the concept of building structures big and small still hasn’t lost any of its charm. For my children, now 10 and 12, it is probably the most played with toy throughout their childhood. As with any new purchase, they initially and carefully build the specific design for the instructions included in the box. They typically play with the object for a couple of days or a maximum of a few weeks before disassembling or plainly wrecking it and adding it to their big pile of Lego blocks that they use to build anything their imagination can come up with.

    Lego, to me, is the easiest way to explain the prototyping design task. When you go through the Lego set up instructions, it is typically split up into instructions for smaller subsets of the end result: the right leg of a robot, or the garage of a fire station.

    As a child I liked to build ramps for my toy cars or toy train and see how far I could make them jump. This again is very similar to how FPGA-based prototypes allow you to test a design’s interaction with the real world.

    Does the power management software correctly make the design wake up when a USB device is inserted in the PHY daughter board? Does the embedded software algorithm correctly identify an object that is put in front of the camera?

    As SoCs become bigger and more complex, the task of prototyping the subsystems and eventually putting everything together has gained in importance. It is important to validate a design in context of its real world interfaces pre-silicon.

    Reply
  16. Tomi Engdahl says:

    Silego CEO Talks Configurable Mixed-signal ICs
    https://www.eetimes.com/document.asp?doc_id=1332401&

    Silego Technology Inc.’s commercialization of configurable mixed-signal ICs brought designers a new paradigm for achieving highly integrated solutions. CMICs combine analog, digital, and nonvolatile-memory functionality with software tools in a flexible, cost-effective design and prototyping platform. On the heels of Silego’s August announcement that it had shipped its 3 billionth CMIC, EE Times sat down with John Teegen, the fabless semiconductor company’s CEO, to talk about the industry’s affinity for functionality convergence and Silego’s plans for capitalizing on that trend in new markets.

    CMIC integration lets engineers eliminate many legacy linear, passive, and discrete components from their designs. Since the product category’s introduction about three years ago, there have been five generations of CMIC silicon and design tools, each adding functionality and enhancing the design experience.

    Silego recently announced the SLG46580 GreenPAK CMICs, targeted to support power systems in wearable and handheld devices. Both highly integrated and highly flexible, the SLG46580 provides a rich set of features, including voltage monitoring, power sequencing, reset functionality, and configurable low-dropout voltage regulators (LDOs).

    Reply
  17. Tomi Engdahl says:

    Smooth Succession Expected at TSMC
    https://www.eetimes.com/document.asp?doc_id=1332400

    Taiwan Semiconductor Manufacturing Co. (TSMC) is likely to see a smooth transition to new management once current Chairman Morris Chang retires in June next year, according to analysts who cover the company.

    It may not be easy following in the chairman’s footsteps longer term, however. Chang founded TSMC in 1987 as one of the world’s first pure-play foundries, a startup that at the time was viewed skeptically within the chip ecosystem. Even so, contract manufacturers such as TSMC today lead the growth of the semiconductor industry. TSMC has grabbed more than half of the foundry market by offering advanced process technology and ample production capacity to customers that range from Apple to ZTE.

    Reply
  18. Tomi Engdahl says:

    What a miracle MOMS sensor?

    But what’s the point of MOMS? The Belgian Microelectronics Research Center IMEC has developed a pressure-measuring MOMS sensor.

    The abbreviation will be “micro-optomechanical system”, ie a micro-optomechanical system. A new type of sensor measures the pressure very closely and, for example, EMI interference as an immune.

    Pressure sensors measure height or depth, or, for example, blood flow to the veins. This is typically done using MEMS-based sensors or optical fiber-based techniques. Both of these have both advantages and disadvantages.

    According to IMECI, the MOMS pressure sensor combines the benefits of these two technologies, that is, the good performance and small size of the MEMS components, and the difficult conditions for fiber matching. As a result of MEMS components, the result is a highly accurate pressure measurement device that does not interfere with EMI radiation.

    Source: http://www.etn.fi/index.php/13-news/6946-mikae-ihmeen-moms-anturi

    Reply
  19. Tomi Engdahl says:

    IEEE S3S 2017 Showcases Monolithic 3D Technologies
    https://www.eetimes.com/author.asp?section_id=36&doc_id=1332309&

    A technology that could bridge the processor memory gap, Monolithic 3D has DARPA’s attention. The agency wants proposals by Nov 6. Learn more at an upcoming IEEE conference.

    On Sept 13 the Defense Advanced Research Projects Agency (DARPA) launched a giant funding effort to ensure the United States will sustain the pace of electronic innovation vital to both a flourishing economy and a secure military. Under the banner of the Electronics Resurgence Initiative (ERI), some $500-$800 million will be invested in post-Moore’s law technologies.

    Among those is the 3DSoC program. “The overall goal of the Three Dimensional Monolithic System-on-a-Chip (3DSoC) program” DARPA wrote in a statement, “is to develop 3D monolithic technology that will enable > 50X improvement in SOC digital performance at power. 3DSoC aims to drive research in process, design tools, and new compute architectures for future designs while utilizing U.S. fabrication capabilities.” As is illustrated in the following chart:

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  20. Tomi Engdahl says:

    Leti Service Pins European IC Innovation to Emulator Access
    https://www.eetimes.com/document.asp?doc_id=1332413&

    European technology development has always been a strong factor in the economies of the region, where the ability to create high-margin goods is vital to competitiveness. In the area of IC and system-on-chip (SoC) design and development, cooperative innovation is driving European industry forward.

    One new avenue for cooperative development is an arrangement between CEA-Leti (Grenoble, France), the storied French research institute, and Mentor, a Siemens business, to let small and medium enterprises (SMEs) and startups access the Mentor Veloce emulator that was installed at Leti in 2013. Use of the high-capacity, high-speed, multi-application tool for emulation of SoC designs will enable regional organizations to develop complex digital circuits more efficiently by enabling early-stage design debug, along with upstream validation, according to Leti. Allowing startups to use such tools will foment advances by speeding the design cycle and proliferating emulation-based verification methodology among a wider population of developers.

    Reply
  21. Tomi Engdahl says:

    Dialog Semi to Buy Silego for up to $306 Million
    https://www.eetimes.com/document.asp?doc_id=1332406&

    Dialog Semiconductor said it would buy privately held configurable mixed-signal IC (CMIC) vendor Silego Technology for up to $306 million, in a deal it said would grow Dialog’s sales at existing customers and also expand its customer base.

    Dialog executives described Silego’s technology as highly complementary to Dialog’s own power management and connectivity offerings. They estimated the deal would expand Dialog’s total addressable market by more than $1.4 billion.

    Silego’s CMICs combine analog, digital, and nonvolatile-memory functionality with software tools in a flexible, cost-effective design and prototyping platform. Silego (Santa Clara, Calif.) announced in August that it shipped its 3 billionth device.

    “What Silego has developed is truly unique — a mixed-signal platform which customers can configure to their design requirements on the fly, drastically reducing the time to bring their products to market,” said Jalal Bagherli, Dialog’s CEO, in a statement.

    Reply
  22. Tomi Engdahl says:

    Growth in Power Semis Forecast Through 2021
    https://www.eetimes.com/document.asp?doc_id=1332405&

    The global power semiconductor market is expected to rise annually through 2021, led by strength in the automotive and industrial markets, according to market research firm IHS Markit.

    “The industry megatrends of vehicle electrification, advanced vehicle safety, energy efficiency and connected everything will continue to drive growth over the next five years,” said Kevin Anderson, senior analyst for power management at IHS Markit, in a press statement.

    IHS predicts that the power semiconductor market will be worth $38.3 billion in 2017, up 7.5 percent compared to last year. The market grew 3.9 percent last year after declining by 4.8 percent in 2015, according to the firm.

    Reply
  23. Tomi Engdahl says:

    Smooth Succession Expected at TSMC
    https://www.eetimes.com/document.asp?doc_id=1332400

    Taiwan Semiconductor Manufacturing Co. (TSMC) is likely to see a smooth transition to new management once current Chairman Morris Chang retires in June next year, according to analysts who cover the company.

    Reply
  24. Tomi Engdahl says:

    Foundries Target China
    https://www.eetimes.com/document.asp?doc_id=1332414&

    China is expected to account for 13 percent of sales for the world’s pure-play chip foundries in 2017, up from 12 percent last year, as the country’s fabless semiconductor activity continues to accelerate, according to market research firm IC Insights.

    Pure play foundry sales in China are expected to reach $7 billion in 2017, up 16 percent from 2016, according to IC Insights. The growth rate is more than double the overall growth rate for global pure play foundry sales, the research firm noted.

    TSMC is forecast to hold about 46 percent of the market for China’s pure play foundry sales with sales of about $3.2 billion, up 10 percent from 2016, IC Insights said.

    Reply
  25. Tomi Engdahl says:

    Functional Safety Issues Rising
    https://semiengineering.com/functional-safety-issues-rising/

    Cost and time spent in simulation and test grow as more chips are developed for automotive, industrial and medical markets.

    Developing semiconductors for safety-critical markets such as automotive, industrial and medical involves a growing list of extra steps that need to be taken pre- and post-manufacturing to ensure product integrity, reliability and security.

    This is causing several significant changes:

    • Designs are becoming much more complicated because they require such features as failover and redundancy.
    • Designs are undergoing multiple changes prior to production because specifications and standards are either still in development or constantly being updated.
    • Systems involving functional safety are becoming much more expensive because the cost of verifying, testing and manufacturing these devices is going up.

    Reply
  26. Tomi Engdahl says:

    Achieving ISO 26262 Certification With ASIL-Ready IP
    What does it take to develop chips that comply with assisted and autonomous driving requirements?
    https://semiengineering.com/achieving-iso-26262-certification-with-asil-ready-ip/

    Reply
  27. Tomi Engdahl says:

    The Week In Review: Manufacturing
    2018 trends; breaking Moore’s Law; China foundry sales; ASICs.
    https://semiengineering.com/the-week-in-review-manufacturing-175/

    As expected, TSMC plans to build a fab for 3nm processes. The fab will be located in the Tainan Science Park in Taiwan. Separately, TSMC Chairman Morris Chang announced plans that he will retire after the annual shareholders meeting in June of 2018.

    Dialog Semiconductor, a provider of power management chips, has signed a definitive agreement to acquire Silego Technology, a supplier of configurable mixed signal ICs, for a cash payment of $276 million with additional contingent consideration of up to $30.4 million.

    Intel announced that the company’s former CEO Paul Otellini passed away in his sleep Monday, Oct. 2, 2017, at the age of 66.

    There is a great deal of ASIC design activity around AI and other applications, according to a report from Semico. “AI in the form of pattern recognition, voice recognition and language translation will find its way into almost every device and application that has a CPU, GPU, DSP, VPU or FPGA and some level of computational resources in the near future,”

    Reply
  28. Tomi Engdahl says:

    Reuters:
    Germany’s Dialog Semiconductor announced it is buying California-based chip designer Silego for up to $306M

    Dialog Semiconductor to buy Silego to expand into Internet of Things
    http://www.reuters.com/article/us-silego-m-a-dialog/dialog-semiconductor-to-buy-silego-to-expand-into-internet-of-things-idUSKBN1CA0QA

    Reply
  29. Tomi Engdahl says:

    Leti Service Pins European IC Innovation to Emulator Access
    https://www.eetimes.com/document.asp?doc_id=1332413&

    WEISBADEN, Germany — European technology development has always been a strong factor in the economies of the region, where the ability to create high-margin goods is vital to competitiveness. In the area of IC and system-on-chip (SoC) design and development, cooperative innovation is driving European industry forward.

    One new avenue for cooperative development is an arrangement between CEA-Leti (Grenoble, France), the storied French research institute, and Mentor, a Siemens business, to let small and medium enterprises (SMEs) and startups access the Mentor Veloce emulator that was installed at Leti in 2013. Use of the high-capacity, high-speed, multi-application tool for emulation of SoC designs will enable regional organizations to develop complex digital circuits more efficiently by enabling early-stage design debug, along with upstream validation, according to Leti. Allowing startups to use such tools will foment advances by speeding the design cycle and proliferating emulation-based verification methodology among a wider population of developers.

    Reply
  30. Tomi Engdahl says:

    Japanese Gems Surface in Unlikely Places
    https://www.eetimes.com/document.asp?doc_id=1332417&

    Japan’s electronics industry is floundering. For examples, look no further than Toshiba’s never-ending drama over sales of its NAND flash business, and Foxconn’s takeover last year of LCD giant Sharp.

    Time to write off Japan? Perhaps, but first a number of undervalued gems buried beneath the surface of Japanese big business.

    Any hunt today for a hot electronics business or promising electronics technologies in Japan has to round up more than the usual suspects, like Toshiba, Sony or NEC. Many of the old-guard electronics companies, as a matter of survival, have sold off or folded their sprawling R&D projects or budding business units.

    The first step in finding Japan’s diamonds in the rough is to seek out corporations whose main business is not in electronics.

    Toray Industries Inc., for instance, is primarily known for textiles. In recent years, however, Toray has diversified into electronic circuit- and semiconductor-related materials and optical filters for flat panel displays. It has made itself into something of a powerhouse in nanofibers, carbon fiber component materials, and a microstructure control technology called Nanoalloy.

    Reply
  31. Tomi Engdahl says:

    Reuters:
    Bain Capital said it aims to list Toshiba Corp’s chip unit on Tokyo Stock Exchange within 3 years, to cash in on its investment after leading $18B acquisition
    http://www.reuters.com/article/us-toshiba-accounting/bain-capital-aims-to-list-toshiba-chip-unit-in-three-years-idUSKBN1CA0EK

    Reply
  32. Tomi Engdahl says:

    Toshiba Introduces Photocouplers for High-Speed Communications
    https://www.eeweb.com/news/toshiba-introduces-photocouplers-for-high-speed-communications

    Toshiba America Electronic Components, Inc. announced two photocouplers for high-speed communications: the TLP2767 and TLP2367.

    The TLP2767 is the first 50Mbps photocoupler in the industry to provide both a creepage and clearance distance of 8mm and isolation thickness of 0.4mm, supporting reinforced isolation. It features isolation voltage of 5000Vrms (min) and is housed in a SO6L package. The TLP2367 provides creepage and clearance distance of 5mm (min) and isolation voltage of 3750Vrms.

    With a propagation delay time of 20ns (max), pulse width distortion of 8ns (max), and propagation delay skew of ±10ns (max), the photocouplers can be used to reduce the dead time of various interfaces, which can improve the power efficiency of equipment.

    Reply
  33. Tomi Engdahl says:

    Toward System-Level Test
    What’s working in test, what isn’t, and where the holes are.
    https://semiengineering.com/toward-system-level-test/

    The push toward more complex integration in chips, advanced packaging, and the use of those chips for new applications is turning the test world upside down.

    Most people think of test as a single operation that is performed during manufacturing. In reality it is a portfolio of separate operations, and the number of tests required is growing as designs become more heterogeneous and as they are used in markets such as automotive and industrial markets where chips are expected to last 10 to 20 years. In fact, testing is being pushed much further forward into the design cycle so that test strategies can be defined early and built into the flow. Testing also is becoming an integral part of post-manufacturing analysis as a way of improving yield and reliability, not just in the chip, but across an entire system in which that chip and other chips are being used.

    Under the “test” banner are structural, traffic and functional tests, as well as built-in self-test to constantly monitor components. The problem is that not all of the results are consistent, which is why there is a growing focus on testing at a system level.

    “From a system point of view, the focus is on the traffic test,” said Zoe Conroy, test strategy lead at Cisco. “But just putting a sensor in the corner of a die doesn’t measure anything. You need to put it right in the middle of a hotspot. The challenge is understanding where that is because hotspots found during ATE are different than the hotspots found during a traffic test. You also need to understand how memory is used in functional mode because what we’ve found at 28nm is that the whole memory is not being tested.”

    Problems are showing up across the test spectrum as existing technologies, flows and expertise are applied to new problems—or at least more complex problems.

    “With deep learning and machine learning, Nvidia is selling a lot of boards and systems into the data center,”

    “You can’t test everything at the same time,” said Derek Floyd, director of business development for power, analog and controller solutions at Advantest. “No one will pay for it. Tests need to be multi-domain, but that’s very different. ATE is predictably deterministic. It’s a nice clean environment. With system-level test, you’re adding in things like cross-talk, jitter, parametric effects, and you need to do code monitoring. But you don’t necessarily get the access you want inside of the chip, so you look at the limits and what is the most critical thing to isolate in a design.”

    Defining system-level test
    System-level test is the ability to test a chip, or multiple chips in a package, in the context of how it ultimately will be used. While the term isn’t new, the real-world application of this technology has been limited to a few large chipmakers.

    That is beginning to change, and along with that the definition is beginning to evolve. Part of the reason is the growing role that semiconductors are playing in various safety-critical markets, such as automotive, industrial and medical. It’s also is partly due to the shift away from a single processsing element to multiple processor types within a device, including a number of accelerators such as FPGAs, eFPGAs, DSPs and microcontrollers. But even within a variety of mobile devices, the cloud, or in machine learning/AI, understanding the impact of real-world use cases on a chip’s performance—and such physical effects as thermal migration and its effect on electromigration and mean time to failure—are becoming critical metrics for success.

    Reply
  34. Tomi Engdahl says:

    Chip Sales Forecasts Lifted Again
    https://www.eetimes.com/document.asp?doc_id=1332440&

    Market watchers are once again increasing their forecasts for 2017 semiconductor sales growth, as the red hot memory chip market shows no signs of cooling.

    Both market research firm Gartner and independent semiconductor industry analyst Mike Cowan are now predicting that chip sales will top the $400 billion mark for the first time in 2017. Gartner is forecasting that chip sales will reach $411 billion this year, a 19.7 percent increase from last year, while Cowan’s forecast calls for sales to rise 18.9 percent to reach $403 billion.

    Price increases for memory chips, particularly DRAM and NAND flash, continue to set the pace. Gartner is now projecting that memory chip sales will rise 57 percent this year.

    “A shortage of memory, and in particular DRAM, is driving semiconductor revenue higher,” said Jon Erensen, a research director at Gartner, in a press statement. “Strength is spreading to other semiconductor categories as well with non-optical sensors, analog, discretes and image sensors all forecast to grow over 10 percent in 2017.”

    Forecasters, including the World Semiconductor Trade Statistics (WSTS) organization, were already expecting the semiconductor industry to post its highest growth rate since the recession recovery year of 2010.

    In August, sales topped the $35 billion mark for the first time, according to WSTS. Sales are now expected to top $400 billion for the first time this year after eclipsing $300 billion in 2010 and $200 billion in 2000.

    Reply
  35. Tomi Engdahl says:

    DARPA Calls For 50X Improvement in SoC
    Detailed in the 3DSoC Program
    https://www.eetimes.com/author.asp?section_id=36&doc_id=1332429&

    As recently reported, in an effort to initiate resurgence of the U.S. electronics industry, some $500-$800 million will be invested in post-Moore’s Law technologies.

    Quoting from the BAA: “As noted above, the 3DSoC technology demonstrated at the end of the program (3.5 Years) should also have the following characteristics:

    Capability of > 50X the performance at power when compared with 7nm 2D CMOS technology.
    …” This is a paradigm shift for the computer industry and to high-tech world as normal scaling would provide as 3x at best, as indicated by the following well known chart:

    Reply
  36. Tomi Engdahl says:

    Limitations of 3D NAND Scaling
    https://www.eetimes.com/author.asp?section_id=36&doc_id=1332422&

    The life span of 3D NAND might be a lot shorter than most people think.

    At the Flash Memory Summit this year, Samsung announced its development of 1Tb 3D NAND, which would be used for commercial products launching next year. However, I wonder when the 4Tb 3D NAND will hit the market.

    Based on the information available on TLC 512Gb 3D NAND with 64-layer on about 130mm2 die size (from Samsung and Toshiba) and assuming string stacking of 64-layer, I figured that in order to implement the 4Tb NAND chip:

    Eight string stacks of 64-layer are needed. Which will make (512Gb x 8) = 4Gb
    The total layer then becomes 512-layer on 130mm2 die size
    It will take about a year to process a wafer, 5 weeks for memory logic plus 8 times (i.e. 8 string stack of 64-layer) 5 to 6 weeks for a 64-layer cell layer implementation. Therefore, the wafer processing time for a 512-layer will be about 45 to 53 weeks.

    If this simple assessment is right, then it is practically impossible to implement the 4Tb NAND chip. If QLC is considered instead of TLC, there will be an improvement of 25 percent at best. So, a 410-layer will be needed for QLC 4Tb 3D NAND and about nine months of wafer processing time.

    Reply
  37. Tomi Engdahl says:

    Taiwan Hits Qualcomm With $774 Million Fine
    https://www.eetimes.com/document.asp?doc_id=1332433&

    Regulators in Taiwan have levied a fine of roughly $774 million against Qualcomm for anti-competitive behavior, becoming the latest in a string of jurisdictions to find fault with the mobile chip giant’s business practices.

    Taiwan’s Fair Trade Commission (TFTC) detailed the findings of its investigation into Qualcomm in a statement released Wednesday (Oct. 11), saying among other things that Qualcomm’s business model harms competition and violates Taiwan’s Fair Trade Act. According to a report by the Bloomberg news service, the fine is the largest ever imposed by the TFTC.

    Qualcomm said in a statement that it disagrees with the decision and plans to appeal.

    “The fine bears no rational relationship to the amount of Qualcomm’s revenues or activities in Taiwan, and Qualcomm will appeal the amount of the fine and the method used to calculate it,” the company said.

    Reply
  38. Tomi Engdahl says:

    Semiconductors make a new record

    Microcircuits will be sold this year by $ 411 billion. The figure is a new record in the field. According to Gartner, growth is still largely based on good memory gains.

    $ 411.1 billion means a 19.7 percent increase in last year’s figures. The pace is better than ever after 2010. At that time, the financial crisis came up as high as 31.8 percent.

    According to Gartner, memory chips are sold this year 57 per cent more than last year. There is still a shortage of many circuits, especially DRAMs. The average prices are rising and the market is growing.

    Source: http://etn.fi/index.php/13-news/6991-puolijohteissa-tehdaeaen-uusi-ennaetys

    Reply
  39. Tomi Engdahl says:

    Helix Entry Outperforms ‘Zero Power’ Target in Standby
    https://www.eetimes.com/document.asp?doc_id=1332442&

    Today’s semiconductors run on extremely low voltages compared with their power sources, requiring DC/DC power supply output-voltage conversion from the 12 to 48 V typical for the source to as low as 1.5 V. In addition, electronic-device applications from smart grids to VoIP phones have adopted a “zero power” goal, defined as lower than 5 milliwatts, for standby mode.

    Helix Semiconductors designed its eMpower line of voltage converters, announced at this year’s IEEE Applied Power Electronics Conference(APEC 2017), to meet zero-power expectations for voltage conversion efficiency. The latest addition to the line, the HS200 DC/DC converter, exceeds the zero-power goal by 10 times, consuming 0.5 mW in standby mode, according to Helix.

    “Our end-to-end efficiency comparison measurements have shown that the HS200 provides up to a 10 percent improvement over competitors’ latest offerings converting 48 V to regulated 5 V, and a significantly higher improvement over most available 48-V-to-low-voltage converters,” Harold Blomquist, president and CEO of Helix Semiconductors, told EE Times.

    The HS200 DC/DC converter is designed for applications requiring voltage conversion from unregulated 12- to 48-V inputs to outputs as low as 1.5 V (or to 5 V, which can then be stepped down again with an inexpensive, widely available point-of-load regulator next to chips with different requirements, from 3.3 to 1.5 V).

    Reply
  40. Tomi Engdahl says:

    Semiconductor Tool Market Continues to Cool
    https://www.eetimes.com/document.asp?doc_id=1332423&

    Semiconductor manufacturing equipment sales declined sequentially for a second straight month in August, as the fab tool market that has soared for most of 2017 continues its inevitable descent.

    The three-month rolling average of semiconductor equipment billings from North American tool vendors dipped to $2.18 billion in August, according to the SEMI trade association. However, billings were still almost 28 percent ahead of the August 2016 figure, SEMI said, and the market remains on pace for record annual sales of more than $49 billion.

    Reply
  41. Tomi Engdahl says:

    Intel May Sit Out Race to EUV
    Zeiss lenses said to be in short supply
    https://www.eetimes.com/document.asp?doc_id=1332420

    A race is on to qualify advanced semiconductor process technologies using extreme ultraviolet (EUV) lithography, but Intel is said to be sitting on the sidelines.

    ASML reported in July a backlog of 21 orders for the EUV systems which cost as much as $150 million each. The company is expected to take through 2019 to fill the orders. It announced in March its NXE:3400B as its first production-ready system.

    “The biggest problem is getting more lenses, Zeiss doesn’t have capacity to supply more,” said G. Dan Hutcheson, chief executive of market watcher VLSI Research. Hutcheson expects eight or nine systems will be delivered this year.

    Reply

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