Here are some of my collection of newest trends and predictions for year 2018. I have not invented those ideas what will happen next year completely myself. I have gone through many articles that have given predictions for year 2018. Then I have picked and mixed here the best part from those articles (sources listed on the end of posting) with some of my own additions to make this posting.This article contains very many quotations from those source articles (hopefully all acknowledged with link to source).
The general trend in electronics industry is that the industry growth have been driven by mobile industry. Silicon content in smartphones and other mobile devices is increasing as vendors add greater functionality. Layering on top of that are several emerging trends such as IoT, big data, AI and smart vehicles that are creating demand for greater computing power and expanding storage capacity.
Manufacturing trends
According to Foundry Challenges in 2018 article the silicon foundry business is expected to see steady growth in 2018. The growth in semiconductor manufacturing will remain steady, but there will be challenges in the manufacturing capacity and expenses to move to the next nodes. For most applications, unless you must have highest levels of performance, there may not be as compelling a business case to focus on the bleeding-edge nodes. Over the last two years, the IC industry has experienced an acute shortage of 200mm fab capacity (legacy MCU, power, sensors, 6-micron to 65nm). In 2018, 200mm capacity will remain tight. An explosion in 200mm demand has set off a frenzied search for used semiconductor manufacturing equipment that can be used at older process nodes. The problem is there is not enough used equipment available. The profit margins in manufacturing are so thin in markets served by those fabs that it’s hard to justify paying current rising equipment prices, and newcomers may have a tough time making inroads. Foundries with fully depreciated 200mm equipment and capacity already are seeing increased revenues in their 200mm business.The specialty foundry business is undergoing a renaissance, thanks to the emergence of 5G and automotive.
300mm is expected to follow a similar path for lack of capacity because 300mm fabs already produce leading-edge chips and more mainstream 300mm demand is driven by MCUs, wireless communications and storage applications. Early predictions are for solid growth in 2018, fueled by demand for memory and logic at advanced 10/7nm.
In 2017, marking the first time that the semiconductor equipment market has exceeded the previous market high of US$47.7 billion set in 2000. Fab tool vendors found themselves in the midst of an unexpected boom cycle in 2017, thanks to enormous demand for equipment in 3D NAND and, to a lesser degree, DRAM. In 2018, equipment demand looks robust, although the industry will be hard-pressed to surpass the record growth figures in 2017. In 2018, 7.5 percent growth is expected to result in sales of US$60.1 billion for the global semiconductor equipment market – another record-breaking year. Demand looks solid across the three main growth drivers for fab tool vendors—DRAM, NAND and foundry/logic.
Rising demand for chips is hitting the IC packaging supply chain, causing shortages of select manufacturing capacity, various package types, leadframes and even some equipment. Spot shortages for some IC packages began showing up in 2017, but the problem has been growing and spreading since then, so packaging customers may encounter select shortages well into 2018. Apple Watch 3 shipment growth to benefit Taiwan IC packagers in 2018.
Market for advanced packaging begins to diverge based on performance and price. Advanced Packaging is now viewed as the best way to handle large amounts of data at blazing speeds.
Moore’s law
Many recent publications say Moore’s Law is dead. Though Moore’s Law is dead may be experiencing some health challenges, it’s not time to start digging the grave for the semiconductor and electronics market yet.
Even smaller nodes are still being taken to use in high end chips. The node names are confusing. Intel’s 10nm technology is roughly equivalent to the foundry 7nm node.In 2018, Intel is expected to finally ramp up 10nm finally in the first half of 2018. In addition, GlobalFoundries, Samsung and TSMC will begin to ship their respective 7nm finFET processes. On the leading edge, GlobalFoundries, Intel, Samsung and TSMC start migrating from the 16nm/14nm to the 10nm/7nm logic nodes. It is expected that some chip-makers face some challenges on the road. Time will tell if GlobalFoundries, Samsung and TSMC will struggle at 7nm. Early predictions are for solid growth in 2018, fueled by demand for memory and logic at advanced 10/7nm. 7nm is projected to generate sales from $2.5 billion to $3.0 billion in 2018. Over time 10nm/7nm is expected to be a big and long-running node. Suppliers of FPGAs and processors are expected to jump on 10nm/7nm.
South Korea’s Samsung Electronics said it has commenced production of the second generation of its 10nm-class 8-Gb DDR4 DRAM. Devices labeled 10nm-class have feature sizes as small as 10 to 19 nanometers. With the continued need for shrinking pattern dimensions, semiconductor manufacturers continue to implement more complex patterning techniques, such as advanced multi-patterning, for the 10nm design node and beyond. They also are investing significant development effort in readying EUV lithography for production at the 7/5nm design nodes. Samsung is planning to begin transitioning to EUV for logic chips next year at the 7nm node, although it is unclear when the technology will be put into production for DRAM.
There will be talk on even smaller nodes. FinFETs will get extended to at least to 5nm, and possibly 3nm in next 5 years. The path to 5nm loks pretty clear. FinFETs will get extended at least to 5nm. It’s possible they will get extended to 3nm. EUV will be used at new nodes, followed by High NA Lithography. New smaller nodes challenges the chip design as abstractions become more difficult at 7nm and beyond. Models are becoming more difficult to develop, integrate and utilize effectively at 10/7nm and beyond as design complexity, process variation and physical effects add to the number of variables that need to be taken into account. Materials and basic structures may diverge by supplier, at 7 nm and beyond. Engineering and scientific teams at 3nm and beyond will require completely different mixes of skills than today.
Silicon is still going strong, but the hard fact is that CMOS has been running out of steam for several nodes, and that becomes more obvious at each new node. To extend into new markets and new process nodes Chipmakers Look To New Materials. There are a number of compounds in use already (generally are being confined to specific niche applications), such as gallium arsenide, gallium nitride, and silicon carbide. Silicon will be supplemented by 2D materials to extend Moore’s Law. Transition metal dichalcogenides (TMDCs), a class of 2D materials derived from basic elements—principally tellurium, selenium, sulfur, and oxygen—are being widely explored by researchers. TMDCs are functioning as semiconductors in conjunction with graphene. Graphene, the wonder material rediscovered in 2004, and a host of other two-dimensional materials are gaining ground in manufacturing semiconductors as silicon’s usefulness begins to fade. Wide-bandgap semiconductor materials like gallium nitride (GaN) and silicon carbide (SiC) are anticipated to be used in many more applications in 2018. Future progress increasingly will require a mix of different materials and disciplines, but silicon will remain a key component.
Interconnect Materials need to to be improved. For decades, aluminum interconnects were the industry standard. In the late 1990s, chipmakers switched to copper. Over the years, transistors have decreased dramatically in size, so interconnects also have had to scale in size leading to roadblock known as the RC challenge. Industry is investing significant effort in developing new approaches to extend copper use and finding new metals. There’s also some investigation into improvements on the dielectric side. The era of all-silicon substrates and copper wires may be coming to an end.
Application markets
Wearables are a question mark. Demand for wearables slowed down in 2017 so much that smart speakers likely outsold wearable devices in 2017 holiday season. eMarketer is estimating that usage of wearable will grow just 11.9 percent in 2018, rising from 44.7 million adult wearable users in 2017 to 50.1 million in 2018. On the other hand market research firm IDC estimates that the shipments of wearable electronics devices are projected to more than double over the next five years as watches displace fitness trackers as the biggest sellers. IDC forecasts that wearables shipments will increase at a compound annual growth rate of 18.4 percent between 2017 and 2021, rising from 113.2 million this year to 222.3 million in 2021. At the same time fitness trackers are expected to become commodity product. Tomorrow’s wearables will become more fully featured and multi-functional.
The automotive market for semiconductors is shifting into high gear in 2018. Right now the average car has about $350 worth of semiconductor content, but that is projected to grow another 50% by 2023 as the overall automotive market for semiconductors grows from $35 billion to $54 billion. The explosion of drive-by-wire technology, combined with government mandates toward fully electric powertrains, has changed this paradigm—and it impacts more than just the automotive industry. Consider implications beyond the increasingly complex vehicle itself, including new demands on supporting infrastructure. The average car today contains up to 100 million lines of code. Self-driving car will have considerably more code in it. Software controls everything from safety critical systems like brakes and power steering, to basic vehicle controls like doors and windows. Meeting ISO 26262 Software Standards is needed but it will not make the code bug free. It’s quickly becoming common practice for embedded system developers to isolate both safety and security features on the same SoC. The shift to autonomous vehicles marks a major shift in the supply chain—and a major opportunity.
Many applications have need for a long service life — for example those deployed within industrial, scientific and military industries. In these applications, the service life may exceed that of component availability. Replacing an advanced, obsolete components in a design can be very costly, potentially requiring an entire redesign of the electronic hardware and software. The use of programmable devices helps designers not only to address component obsolescence, but also to reduce the cost and complexity of the solution. Programmable logic devices are provided in a range of devices of different types, capabilities and sizes, from FPGAs to System on Chips (SoC) and Complex Programmable Logic Devices (CPLD). The obsolete function can be emulated within the device, whether it is a logic function implemented in programmable logic in a CPLD, FPGA or SoC, or a processor system implemented in an FPGA or SoC.
Become familiar with USB type C connector. USB type C connector is becoming quickly more commonplace than any other earlier interface. In the end of 2016 there were 300 million devices using a USBC connection – a big part was smartphones, but the interface was also widespread on laptops. With growth, the USBC becomes soon the most common PC and peripheral interface. Thunderbolt™ 3 on USBC connector promises to fulfill the promise of USB-C for single-cable docking and so much more.
Power electronics
The power electronics market continues to grow and gain more presence across a variety of markets. 2017 was a good year for electric vehicles and the future of this market looks very promising. In 2017, we saw also how wireless charging technology has been adopted by many consumer electronic devices- including Apple smart phones. Today’s power supplies do more than deliver clean and stable dc power on daily basis—they provide advanced capabilities that can save you time and money.
Wide-bandgap semiconductor materials like gallium nitride (GaN) and silicon carbide (SiC) are anticipated to be used in many more applications in 2018. At the moment, the number of applications for those materials is steadily increasing in the automotive and military industry. Expect to see more adoption of SiC and GaN materials in automotive market.
According to Battery Market Goes Bigger and Better in 2018 article advances in battery technologies hold the keys to continuing progress in portable electronics, robotics, military, and telecommunication applications, as well as distributed power grids. It is difficult to see lithium-ion based batteries being replaced anytime soon, so the advances in battery technology are primarily through the application of lithium-ion battery chemistries. New battery protection for portable electronics cuts manufacturing steps and costs for Lithium-ion.
Transparency Market Research analysts predict that the global lithium-ion battery market is poised to rise from $29.67 billion in 2015 to $77.42 billion in 2024 with a compound annual growth rate of 11.6 %. That growth has already spread from the now ubiquitous consumer electronics segment to automotive, grid energy, and industrial applications. Dramatic increase is expected for battery power for the transportation, consumer electronic, and stationary segments. According to Bloomberg New Energy Finance (BNEF), the global energy-storage market will double six times between 2016 and 2030, rising to a total of 125 G/305 gigawatt-hours. In 2018, energy-storage systems will continue proliferating to provide backup power to the electric grid.
Memory
Memory business boomed in 2017 for both NAND and DRAM. The drivers for DRAM are smartphones and servers. Solid-state drives (SSDs) and smartphones are fueling the demand for NAND. Both the DRAM and NAND content in smartphones continues to grow, so memory business will do well in 2018.Fab tool vendors found themselves in the midst of an unexpected boom cycle in 2017, thanks to enormous demand for equipment in 3D NAND and, to a lesser degree, DRAM. In 2018, equipment demand looks robust, although the industry will be hard-pressed to surpass the record growth figures in 2017.
NAND Market Expected to Cool in Q1 from the crazy year 2017, but it is still growing well because there is increasing demand. The average NAND content in smartphones has been growing by roughly 50% recently, going from approximately 24 gigabytes in 2016 to approximately 38 gigabytes today.3D NAND will do the heavy memory lifting that smartphone users demand. Contract prices for NAND flash memory chips are expected to decline in during the first quarter of 2018 as a traditional lull in demand following the year-end quarter.
Lots of 3D NAND will go to solid state drives in 2018. IDC forecasts strong growth for the solid-state drive (SSD) industry as it transitions to 3D NAND. SSD industry revenue is expected to reach $33.6 billion in 2021, growing at a CAGR of 14.8%. Sizes of memory chips increase as number of layer in 3D NAND are added. We’ve already scaled up to 48 layers. Does this just keep scaling up, or are there physical limits here? Maybe we could see a path to 256 layers in few years.
Memory — particular DRAM — was largely considered a commodity business. Though that it’s really not true in 2017. DRAM memory marked had boomed in 2017 at the highest rate of expansion in 23 years, according to IC Insights. Skyrocketing prices drove the DRAM market to generate a record $72 billion in revenue, and it drove total revenue for the IC market up 22%. Though the outlook for the immediate future appears strong, a downturn in DRAM more than likely looms in the not-too-distant future. It will be seen when there are new players on the market. It is a largely unchallenged assertion that Chinese firms will in the not so distant future become a force in semiconductor memory market. Chinese government is committed to pumping more than $160 billion into the industry over a decade, with much of that ticketed for memory startups.
There is search for faster memory because modern computers, especially data-center servers that skew heavily toward in-memory databases, data-intensive analytics, and increasingly toward machine-learning and deep-neural-network training functions, depend on large amounts of high-speed, high capacity memory to keep the wheels turning. The memory speed has not increased as fast as the capacity. The access bandwidth of DRAM-based computer memory has improved by a factor of 20x over the past two decades. Capacity increased 128x during the same period. For year 2018 DRAM remains a near-universal choice when performance is the priority. There has been some attempts to very fast memory interfaces. Intel the company has introduced the market’s first FPGA chip with integrated high-speed EMBED (Embedded Multi-Die Interconnect Bridge): The Stratix 10 MX interfaces to HMB2 memory (High Memory Bandwidth) that offers about 10 times faster speed than standard DDR-type DIMM.
There is search going on for a viable replacement for DRAM. Whether it’s STT-RAM or phase-change memory or resistive RAM, none of them can match the speed or endurance of DRAM. Necessity is the mother of invention, and we see at least two more generations after 1x. XPoint is also coming up as another viable memory solution that could be inserted into the current memory architecture. It will be interesting to see how that plays out versus DRAM.
5G and IoT
5G something in it for everyone. 5G is big. 5G New Radio (NR) wireless technology will ultimately impact everyone in the electronics and telecommunications industries. Most estimates say 2020 is when we will ultimately see some real 5G deployments on a scale. In the meantime, companies are firming up their plans for whatever 5G products and services they will offer. Though test and measurement solutions will be key in the commercialization cycle. 5G is set to disrupt test processes. If 5G takes off, the technology will propel the development of new chips in both the infrastructure and the handset. Data centers require specialty semiconductors from power management to high-speed optical fiber front-ends. 5G systems will drive more complexity in RF front-ends .5G will offer increased capacity and decreased latency for some critical applications such as vehicle-to-vehicle (V2V) or vehicle-to-infrastructure (V2I) communications for advanced driver assistance systems (ADAS) and self-driving vehicles. The big question is whether 5G will disrupt the landscape or fall short of its promises.
Electronics manufacturers expect a lot from Internet of Thing. The evolution of intelligent electronic sensors is creating a revolution for IoT and Industrial IoT as companies bring new sensor-based, intelligent systems to market. The business promise is that the proliferation of smart and connected “things” in the Industrial Internet of Things (IIoT) provides tremendous opportunities for increased performance and lower costs. Industrial Internet of Things (IIoT) has a market forecast approaching $100 billion by 2020. Turning volumes of factory data into actionable information that has value is essential. Predictive maintenance and asset tracking are two big IoT markets to watch in 2018 because they will provide real efficiencies and improved safety. It will be about instrumenting our existing infrastructures with sensors that improve their reliability and help predict failures. It will be about tracking important assets through their lifecycles.
A new breed of designers has arrived that is leveraging inexpensive sensors to build the intelligent systems at the edge of the Internet of Things (IoT). They work in small teams, collaborate online, and they expect affordable design tools that are easy to use in order to quickly produce results. Their goal is to deliver a functioning device or a proof-of-concept to their stakeholders while spending as little money as possible to get there. We need to become multi-functional engineers who can comfortably work in the digital, RF, and system domains.
The Io edge sensor device usually needs to be cheap. Simple mathematical reasoning suggests that the average production cost per node must be small, otherwise the economics of the IoT simply are not viable. Most suppliers to the electronics industry are today working under the assumption that the bill-of-materials (BoM) cost of a node cannot exceed $5 on average. While the sensor market continues to garner billions of dollars, the average selling price of a MEMS sensor, for example, is only 60 cents.
Designing a well working and secure IoT system is still hard. IoT platforms are very complex distributed systems and managing these distributed systems is often an overlooked challenge. When designing for the IoT, security needs to be addressed from the Cloud down to each and every edge device. Protecting data is both a hardware and a software requirement, as more data is being stored and analyzed in edge devices and gateways.
The continued evolution of powerful embedded processors is enabling more functionality to be consolidated into single heterogeneous multicore devices. You will see more mixed criticality designs – those designs which contain both safety-critical and non-safety critical processes running on the same chip. It’s quickly becoming common practice for embedded system developers to isolate both safety and security features on the same SoC.
AI
There is clearly a lot of hype surrounding machine learning (ML) and artificial intelligence (AI) fields. Over the past few years, machine learning (ML) has evolved from an interesting new approach that allows computers to beat champions at chess and Go, into one that is touted as a panacea for almost everything. Machine learning already has delivered beneficial results in certain niches, but it has potential for a bigger and longer lasting impact because of the demand for broad insights and efficiencies across industries. Also EDA companies have been investing in this technology and some results are expected to be announced.
The Battle of AI Processors Begins in 2018. Machine learning applications have a voracious appetite for compute cycles, consuming as much compute power as they can possibly scrounge up. As a result, they are invariably run on parallel hardware – often parallel heterogeneous hardware—which creates development challenges of its own. 2018 will be the start of what could be a longstanding battle between chipmakers to determine who creates the hardware that artificial intelligence lives on. Main contenders on the field at the moment are CPUs, GPUs, TPUs (tensor processing units), and FPGAs. Analysts at both Research and Markets and TechNavio have predicted the global AI chip market to grow at a compound annual growth rate of about 54% between 2017 and 2021.
Sources:
Battery Market Goes Bigger and Better in 2018
Smart speakers to outsell wearables during U.S. holidays, as demand for wearables slows
Wearables Shipments Expected to Double by 2021
The Week In Review: Manufacturing #186
Five technology trends for 2018
NI Trend Watch 2018 explores trends driving the future faster
Creating Software Separation for Mixed Criticality Systems
Isolating Safety and Security Features on the Xilinx UltraScale+ MPSoC
Meeting ISO 26262 Software Standards
DRAM Growth Projected to be Highest Since ’94
NAND Market Expected to Cool in Q1
Memory Market Forecast 2018 … with Jim Handy
3D NAND Storage Fuels New Age of Smartphone Apps
$55.9 Billion Semiconductor Equipment Forecast – New Record with Korea at Top
Advanced Packaging Is Suddenly Very Cool
Apple Watch 3 shipment growth to benefit Taiwan IC packagers in 2018
Rapid SoC Proof-of-Concept for Zero Cost
EDA Challenges Machine Learning
What Can You Expect from the New Generation of Power Supplies?
Optimizing Machine Learning Applications for Parallel Hardware
FPGA-dataa 10 kertaa nopeammin
Chipmakers Look To New Materials
What the Experts Think: Delivering the next 5 years of semiconductor technology
Programmable Logic Holds the Key to Addressing Device Obsolescence
The Battle of AI Processors Begins in 2018
For China’s Memory Firms, Legal Tests May Loom
Predictions for the New Year in Analog & Power Electronics
Lithium-ion Overcomes Limitations
Will Fab Tool Boom Cycle Last?
The Next 5 Years Of Chip Technology
Chipmakers Look To New Materials
Process Window Discovery And Control
Sensors are Fundamental to New Intelligent Systems
Industrial IoT (IIoT) – Where is Silicon Valley
Internet of things (IoT) design considerations for embedded connected devices
How efficient memory solutions can help designers of IoT nodes meet tight BoM cost targets
1,325 Comments
Tomi Engdahl says:
Shortage of talent hits chipmakers
2018-05-09 08:35China Daily Editor: Li Yan ECNS App Download
http://www.ecns.cn/business/2018/05-09/301823.shtml
Only a handful of universities are able to train first-class engineers
China is expected to fill the large talent shortage in its domestic computer chip industry, as the U.S. ban on sales of electronic products to smartphone maker ZTE underscores China’s overreliance on imported chips, experts say.
To achieve its goal, China will need to invest heavily in research, craft more favorable policies for Chinese chipmakers and attract more high-end foreign talent, experts said.
China will also need to bolster its homegrown talent pool by strengthening education and career services for graduates, improve benefits for engineers doing basic research and support innovative and original work in electronic engineering and computer science, they said.
In 2017, there were fewer than 300,000 employees working in China’s integrated circuit industry, but the country needs at least 400,000 more to reach its goal of boosting the industry’s size fivefold before 2030, according to the Ministry of Industry and Information Technology.
Moreover, China has spent more than $200 billion annually importing chips since 2013 due to soaring demand and a lack of Chinese chips in the market, according to the China Semiconductor Industry Association.
Tomi Engdahl says:
IFTLE 382 Semiconductor Activity in China – Betting on AI
http://electroiq.com/insights-from-leading-edge/2018/05/iftle-382-semiconductor-activity-in-china-betting-on-ai/
China is by far the largest consumer of semiconductors reportedly accounting for 45 percent of the worldwide demand for chips, used both in China and for exports. More than 90 percent of its consumption relies on imported ICs.
At the end of 2016 IC Insights reported that China was responsible for ~ 11% of the worlds wafer capacity.
Tomi Engdahl says:
TSMC April revenues down 21% on month
https://www.digitimes.com/news/a20180510VL203.html
Taiwan Semiconductor Manufacturing Company (TSMC) has reported consolidated revenues of NT$81.87 billion (US$2.74 billion) for April 2018, down 21% sequentially but up 44% on year.
TSMC expects to post a 7-8% sequential decrease in consolidated revenues for the second quarter of 2018. “Continued weak demand from our mobile sector will negatively impact our business despite strength in cryptocurrency mining,” said TSMC CFO Lora Ho when giving the foundry’s sales guidance for the second quarter.
TSMC has cut its revenue growth forecast for 2018 to 10% from the previously-estimated 10-15%, citing weaker-than-expected smartphone demand and growing uncertainty facing the cryptocurrency mining market
Tomi Engdahl says:
Amplifiers Boost Test Signals to 26.5 GHz
http://www.mwrf.com/test-measurement/amplifiers-boost-test-signals-265-ghz?NL=MWRF-001&Issue=MWRF-001_20180510_MWRF-001_612&sfvc4enews=42&cl=article_1_b&utm_rid=CPG05000002750211&utm_campaign=17188&utm_medium=email&elq2=5ed5f3d32f584273a2e70a5d6f040705
When higher-level test signals are needed, these GaN-based amplifiers provide the power, with healthy output levels over broad bandwidths from 700 MHz to 26.5 GHz.
Tomi Engdahl says:
Foundry Builds on InP, GaAs, and GaN Wafers
http://www.mwrf.com/semiconductors/foundry-builds-inp-gaas-and-gan-wafers?NL=MWRF-001&Issue=MWRF-001_20180510_MWRF-001_612&sfvc4enews=42&cl=article_2_b&utm_rid=CPG05000002750211&utm_campaign=17188&utm_medium=email&elq2=5ed5f3d32f584273a2e70a5d6f040705
Providing a diverse array of semiconductor processes, this foundry offers the design and measurement tools as well as the experience needed to achieve successful wafer runs.
Advanced defense electronics systems often start with microscopic devices like semiconductors as building blocks, and that’s certainly the case with Northrop Grumman and its high-volume, high-frequency semiconductor foundry. In addition to selling semiconductor devices such as amplifiers and transistors fabricated in the foundry, the company offers foundry services for its gallium-arsenide (GaAs), gallium-nitride (GaN), and indium-phosphide (InP) wafer processes. Thus, customers can try their own monolithic-microwave-integrated-circuit (MMIC) designs on these state-of-the-art, high-volume microwave/millimeter-wave semiconductor processes.
Tomi Engdahl says:
Nanotube Shirts for Energy Harvesting?
http://www.electronicdesign.com/power/nanotube-shirts-energy-harvesting?NL=ED-003&Issue=ED-003_20180510_ED-003_278&sfvc4enews=42&cl=article_2_b&utm_rid=CPG05000002750211&utm_campaign=17203&utm_medium=email&elq2=f3d6e09c461a4f6ab9803f617fd80f13
By stretching and relaxing tightly twisted yarns made of carbon-based nanotube fibers, researchers devised a way to harvest and store the motion as electrical energy.
Tomi Engdahl says:
Save Your ICs from Dreaded ESD
http://www.electronicdesign.com/analog/save-your-ics-dreaded-esd?NL=ED-003&Issue=ED-003_20180509_ED-003_807&sfvc4enews=42&cl=article_1_b&utm_rid=CPG05000002750211&utm_campaign=17182&utm_medium=email&elq2=44a9ec94356f4c4eb18a192a20e52da4
Sponsored by Texas Instruments: Numerous devices are available, such as diode arrays, that make it easier than ever to design in electrostatic-discharge protection.
Tomi Engdahl says:
What’s All This LM331 Stuff, Anyhow?
http://www.electronicdesign.com/analog/what-s-all-lm331-stuff-anyhow?NL=ED-003&Issue=ED-003_20180509_ED-003_807&sfvc4enews=42&cl=article_2_b&utm_rid=CPG05000002750211&utm_campaign=17182&utm_medium=email&elq2=44a9ec94356f4c4eb18a192a20e52da4
The classic LM331 can be a great learning tool when it comes to voltage-to-frequency conversion—one of main pillars of analog design.
Tomi Engdahl says:
Adesto Acquires S3 Semiconductors in Mixed-Signal and Wireless Bid
http://www.electronicdesign.com/embedded-revolution/adesto-acquires-s3-semiconductors-mixed-signal-and-wireless-bid?NL=ED-003&Issue=ED-003_20180511_ED-003_177&sfvc4enews=42&cl=article_2_b&utm_rid=CPG05000002750211&utm_campaign=17267&utm_medium=email&elq2=431426b44cab45af838ffb3196c10c87
Adesto Technologies announced that it would acquire S3 Semiconductors for $35 million in cash and credit, moving beyond its core business of memory chips. The Dublin, Ireland-based company makes mixed-signal, analog and radio frequency chips and it will become a business unit inside Adesto.
Tomi Engdahl says:
Power Averaging to Save Weight, Cost, and Space
http://www.powerelectronics.com/dc-dc-converters/power-averaging-save-weight-cost-and-space?NL=ED-003&Issue=ED-003_20180514_ED-003_688&sfvc4enews=42&cl=article_1_b&utm_rid=CPG05000002750211&utm_campaign=17289&utm_medium=email&elq2=d16717ecb13b42ff94e5f7f3a0a89d32
In most applications, the power supply is sized as if the load is on continuously. But there are many applications where a load will draw power from its source in short bursts. The load is on for a short duration then turns off and then this cycle repeats.
In applications where size and weight are critical and the load is only on for a short duration and is repetitive, the power system can be sized for the average power delivery by using a current limiting converter and a capacitor to supply peak power needs. When configuring such a power system, the designer must take into account the current limit, power limit, and stability of the power supply as well as sizing the capacitor properly to keep the voltage drop at the load within its tolerances. Applications such as pulsed amplifiers, flashing LED lights, and reclosures can take advantage of power averaging to reduce cost, space, and weight within the system.
Many dc power systems that are configured with dc-dc converters are designed to regulate voltage up to a maximum power level and have a maximum current and power rating. If the load tries to draw more than the rated current out of the supply, the supply will typically go into a current limiting mode that will either fold back the output voltage of the supply or the supply will shut down and restart. The current limit is typically set just above the maximum rated current so at the voltage set point of the converter, full power delivery can be achieved. A converter rated for 500 watts at 48 VDC will have a maximum continuous current rating of 500 watts/48VDC or 10.4A. The current limiting feature may start at 13A.
If the load draws more than the maximum current but below the current limit at the voltage set point, then you can overpower the supply and cause eventual power system failure.
The typical configuration for a power averaging supply is shown in Fig. 1. The dc-dc converter is sized for the average power and the capacitor is sized to deliver the peak power while keeping the POL converters or load voltage within its specifications.
The large bulk capacitance can cause many complications for the dc power system.
Power averaging configurations are very effective when the POL converter or load can tolerate a wide input voltage range. This is typically the case where the load is another regulating device or several regulating devices.
Supplies configured for power averaging are very effective for reducing the size, weight, and cost of power systems where the load is on for a short periodic duration.
Tomi Engdahl says:
New Deep Learning Processors, Embedded FPGA Technologies, SoC Design Solutions
#55DAC: Must-see technologies in the DAC 2018 IP track.
https://semiengineering.com/new-deep-learning-processors-embedded-fpga-technologies-soc-design-solutions/
Tomi Engdahl says:
SMIC to start risk production of 14nm FinFET process in 1H19
https://www.digitimes.com/news/a20180511PD210.html
Semiconductor Manufacturing International Corp (SMIC), the largest China-based foundry house, will kick off risk production of its 14nm FinFET process and venture into the AI (artificial intelligence) chip sector in the first half of 2019 after entering volume production of 28nm HKC+ process in the second half 2018, according to the firm’s co-CEO Liang Mong-song.
Liang said at a recent investor conference that SMIC will see an upper single-digit shipment ratio for 28nm process for the whole 2018, with the volume production of its 28nm HKC process to run close to that of its 28nm Poly-SiON process.
In terms of mature process platforms, Liang highlighted the performance upgrades of power management IC process platform, saying that capacities at all its 8-inch wafer fabs are running tight to meet ever-increasing demand for power management ICs including IGBT devices. He added that the high-voltage BCD (bipolar CMOS DMOS) process will be shifted to 12-inch fabs.
Liang also stressed that SMIC will step up its technological developments, aiming to build a comprehensive process platform integrating technologies, IP and design services. In particular, he disclosed, SMIC will move to develop complete AI-based ASIC IPs in the first half of 2019 to provide customers with total IC design solutions.
Tomi Engdahl says:
Power/Performance Bits: May 15
Aluminum batteries; shrinking optical synthesizers; assessing solar tech.
https://semiengineering.com/power-performance-bits-may-15/
Scientists from ETH Zurich and Empa identified two new materials that could boost the development of aluminum batteries, a potential low cost, materially abundant option for temporary storage of renewable energy.
The first is a corrosion-resistant material for the conductive parts of the battery; the second is a novel material for the battery’s positive pole that can be adapted to a wide range of technical requirements.
The first is a corrosion-resistant material for the conductive parts of the battery. The electrolyte fluid in aluminum batteries is extremely aggressive and corrodes stainless steel, and even gold and platinum. The team turned to titanium nitride, a ceramic material that exhibits sufficiently high conductivity. Titanium and nitrogen are both abundant elements, and the material is easy to manufacture.
Tomi Engdahl says:
Be Certain that Your IC is Compliant
http://www.mwrf.com/test-measurement/be-certain-your-ic-compliant?NL=MWRF-001&Issue=MWRF-001_20180515_MWRF-001_317&sfvc4enews=42&cl=article_2_b&utm_rid=CPG05000002750211&utm_campaign=17318&utm_medium=email&elq2=17a18d7220d3439d94e9ea57a8a06128
This application note delves into methods used to test integrated circuits (ICs) for electromagnetic compatibility (EMC) and electromagnetic interference (EMI).
Multichip packages and systems-on-a-chip (SoCs) are widely used to satisfy the demand for high-performing electronic devices. And with emerging applications requiring higher operating frequencies, the circuits used for these applications are becoming more complex. One factor to account for is the large amount of parasitic emissions that can be generated by such complex integrated circuits (ICs). In the application note, “Integrated Circuits (ICs) and Component EMC Testing,” AR RF/Microwave Instrumentation discusses techniques that can be utilized to test ICs for electromagnetic compatibility (EMC) and electromagnetic interference (EMI).
https://www.arworld.us/html/appNote-request.asp?appnote=76
Tomi Engdahl says:
Two square kilometers of silicon wafers
The continued growth in the demand for microcircuits has led to a new record in deliveries of silicon wafer. According to SEMI, the semiconductor industry, in January-March, silicon wafers were sold for 3084 million square meters.
The figure is 7.9 percent higher than a year earlier. Almost two million square meters, nearly two square kilometers, are well over three thousand million square meters.
SEMI has not identified how much sales of different size discs were sold and how much was produced by different process fluxes. However, the wafer used to produce the latest 10 nanometer chips is still modest. Most of the wafer is drawn by exposure processes with older processes.
Two square kilometers of wagons are made during the quarter for a good $ 100 billion business. Semiconductors were sold by Gartner last year for $ 420.4 billion, and the market is expected to grow steadily this year.
Source: http://www.etn.fi/index.php/13-news/8001-kahden-neliometrin-verran-piikiekkoja
Tomi Engdahl says:
Japanese Taiyo Yuden has introduced a ceramic capacitor, the first in the world to reach 1000 microfarad capacitance.
The PMK432 BJ108MU-TE capacitor is 4532 in size, or 4.5 x 3.2 x 3.2 millimeters. In 2015, Taiyo Yuden introduced already the same size multilayer ceramic capacitor reaching 470 microfarads. Innovation brings performance at a time to a new class.
At present, many devices use electrolyte and ceramic capacitors to achieve stable operation of the devices. Taiyo Yuden’s 1000 microfaradine capacitor eliminates the need to use electrolytic capacitors for many designs. Ceramic Multilayer Capacitors are smaller in size,
Source: etn.fi/index.php/13-news/8004-ensimmainen-1000-mikrofaradin-kondensaattori
Tomi Engdahl says:
Small IS Beautiful: Tiny Packages Help Designers Do More with Less
http://www.electronicdesign.com/analog/small-beautiful-tiny-packages-help-designers-do-more-less?NL=ED-003&Issue=ED-003_20180516_ED-003_183&sfvc4enews=42&cl=article_1_b&utm_rid=CPG05000002750211&utm_campaign=17354&utm_medium=email&elq2=d955c8d966dd49a48ac582b58709afb9
Sponsored by Texas Instruments: Such miniaturized packages, from die-size ball grid arrays to extra-small outline no leads, are the way of the future in practically all portable and wearable applications. So, yes, “size does matter.”
Tomi Engdahl says:
Thirteen Top-15 1Q18 Semi Suppliers Register Double-Digit Gains
Samsung extends its number one ranking and sales lead over Intel to 23%.
http://www.icinsights.com/news/bulletins/Thirteen-Top15-1Q18-Semi-Suppliers-Register-DoubleDigit-Gains-/
Tomi Engdahl says:
Chinese chipmaker takes on TSMC and Intel with cutting-edge tool
https://asia.nikkei.com/Business/Companies/Chinese-chip-maker-invests-in-next-gen-tool-to-close-gaps-with-Intel-TSMC-Samsung
SMIC’s $120m order shows zeal to hone domestic tech amid US trade spat
Tomi Engdahl says:
Opinion: New AMD chip goes after $10 billion market that Intel dominates
https://www.marketwatch.com/story/new-amd-chip-goes-after-10-billion-market-that-intel-dominates-2018-05-15
Advanced Micro Devices is launching yet another offensive on a market that has been sewn up by Intel for more than a decade.
While the Ryzen processor family that was unveiled in 2017 goes after a premium segment of the PC market with more than $20 billion of TAM (total addressable market), more than half of that is tied to commercial-device sales. Commercial PCs and notebooks are bought by companies for employees or purchased by employees themselves as part of the BYOD (bring your own device) trend. And that’s what AMD has its eyes on.
Commercial customers have more demanding requirements on product portfolio stability and security, and not having a processor designed for laptops was keeping AMD AMD, +2.97% out of race for that $10 billion segment of the market.
PC manufacturers appear to be signing on to work with AMD and its new family of Ryzen PRO processors.
Tomi Engdahl says:
Micron’s 1x DRAMs Examined
https://www.eetimes.com/author.asp?section_id=36&doc_id=1333289
A TechInsights analyst gives a glimpse into Micron’s 1x nm DRAMs.
After Samsung Electronics began mass-producing 1x nm (likely 18 nm) DRAM products such as DDR4, LPDDR4 and LPDDR4X last year, Micron Technology introduced their DDR4 and LPDDR4 devices with a 1x nm node. Here’s a quick overview of our findings, while TechInsights works on a detailed analysis of the devices.
Micron’s 1x nm DRAM cell architecture uses a 6F2 cell design.
Active and bitline pattern shapes are different when compared with their chips made in a 2y nm (likely, 20 nm) process. Bond pads on the DDR4 device are placed in a row on the center of the die.
Tomi Engdahl says:
More Lithography/Mask Challenges
https://semiengineering.com/more-lithography-mask-challenges-3/
Experts at the table, part 3: Demand for compute power still growing; what’s after 5nm.
SE: It appears that today’s finFET transistors will extend to the 5nm foundry node. What types of transistor types or architectures may appear beyond 5nm? And then, how do we get there in terms of patterning? What types of lithography techniques are required at those nodes?
Fujimura: I have trust that this need for more computing is going to be met by the community somehow. It might be a lot more expensive. But I think it’s going to continue. Then, people are talking about something called neuromorphic computing. It’s basically computing in memory. Nanoimprint and DSA can be applied here. There is also increased software availability in deep learning. And everybody doing that is going to make it easier to program it.
McIntyre: From a device side, our finFET-based devices will likely evolve into a nanowire-based world. This opens up the possibility to do other things. Instead of having a separate nFET and pFET in the device, you can put one on top of each other in stacked nanowires. That’s called a complementary FET or CFET.
Fig. 2: Cross-section simulation of (a) finFET, (b) nanowire, and (c) nanosheet. Source: IBM
Tomi Engdahl says:
Is it the End for New Volume Fabs in the U.S.?
http://blog.semi.org/business-markets/is-it-the-end-for-new-volume-fabs-in-the-u.s
Can it be that no more new semiconductor fabs are being built in the U.S.?
The last new volume fab known is Micron’s Building 60 in Utah, according to the SEMI World Fab Forecast report published in February 2018. The catch is Building 60 is not a new or greenfield facility but rather an existing structure being retooled for 3D NAND. Fab equipment spending for this fab is expected to be high in 2018.
Then there is Fab 42 from Intel. Construction started in 2011 before it was shelved. It is expected to begin equipping by end of this year, with equipment spending expected to be high next year.
Other fabs built many years ago are still ramping such as Globalfoundries Fab 8 phase 3 (TDC) and D1X (module 1 and module 2). D1X is a research and development pilot, not a high-volume fab. And Globalfoundries’ plans for a second fab in Malta have been pushed out.
Samsung in Austin has space for more modules, but there is no indication they will ever be added.
The SEMI World Fab Forecast shows five smaller facilities either planned or under construction, but these have little impact in this U.S. fab construction trend.
And that’s basically it! No more volume fabs!
Tomi Engdahl says:
Chipmakers Look Beyond Scaling
https://semiengineering.com/whos-building-what-and-why/
GlobalFoundries CTO Gary Patton digs into how customers’ priorities are shifting with new market opportunities.
Tomi Engdahl says:
RF SOI Wars Begin
https://semiengineering.com/rf-soi-wars-begin/
5G is driving up demand for both 300mm and 200mm capacity. Both are in short supply.
Several foundries are expanding their fab capacities for RF SOI processes amid huge demand and shortages of this technology for smartphones.
A number of foundries are increasing their 200mm RF SOI fab capacities to meet soaring demand. Then, GlobalFoundries, TowerJazz, TSMC and UMC are expanding or bringing up RF SOI processes in 300mm fabs in an apparent race to garner the first wave of RF business for 5G, the next-generation wireless standard.
RF SOI is a specialized process used to make select RF chips, such as switch devices and antenna tuners, for smartphones and other products. RF SOI is the RF version of silicon-on-insulator (SOI) technology, which is different than fully-depleted SOI (FD-SOI) for digital chips.
There are several dynamics at play with RF SOI. In simple terms, the number of frequency bands has increased in wireless networks. So OEMs must add more RF components, such as RF switches based on RF SOI, in smartphones to deal with the complexity of these bands as well as other issues.
This, in turn, is causing greater-than-expected demand for many RF chips, particularly those based on RF SOI processes.
Tomi Engdahl says:
FinFET Metrology Challenges Grow
https://semiengineering.com/finfet-metrology-challenges-grow/
Hybrid schemes are being deployed, with new equipment and machine learning ramping up.
Tomi Engdahl says:
Infineon to Invest $1.9 Billion to Boost Power Semiconductor Supply
http://www.electronicdesign.com/power/infineon-invest-19-billion-boost-power-semiconductor-supply?NL=ED-003&Issue=ED-003_20180521_ED-003_806&sfvc4enews=42&cl=article_2_b&utm_rid=CPG05000002750211&utm_campaign=17404&utm_medium=email&elq2=b2653e9890c4481088ee72f1d6250c7a
Power semiconductors are a key component in the worldwide shift toward electric vehicles and renewable energy sources like solar and wind. And so Infineon Technologies, grappling with voracious demand, is aiming to boost its supply of the chips with the construction of a new $1.9 billion factory in Europe.
Infineon, the world’s largest maker of power semiconductors with 18.5 percent market share, plans to start building by the first half of next year, with the investment to be spent over six years. The factory located in the Austrian city of Villach is expected to enter production of 300-millimeter wafers by 2021, creating about 400 jobs.
“Global demand for power semiconductors is soaring,” Ploss said in a statement. “We recognized that trend early on” and the Munich, Germany-based company’s new production plant “will help us cater for the growing demand that our customers anticipate, and continue on our path to success in the coming decade,” he said.
Infineon said that the new 60,000-square-foot factory in Villach could potentially handle $2.1 billion in sales every year, with all the available capacity in use.
Tomi Engdahl says:
What’s the Better Battery for Your Portables—Li Ion or Li Poly?
http://www.electronicdesign.com/power/what-s-better-battery-your-portables-li-ion-or-li-poly
Designers opting for a lithium chemistry can choose from traditional cylindrical/prismatic Li-ion or the Li-poly pouch. Many factors, from thermal stability to lifetime, come into play in the decision.
Rechargeable lithium batteries come in a variety of configurations, physical sizes, and capacity ratings. There are three basic configurations within the industry for lithium chemistry. The first are round configurations similar to small barrels, known as cylindrical cells/batteries. Typical sizes are 18 × 65 mm, 21 × 50 mm, and 26 × 65 mm. The next common configurations are flat and rectangular, similar to small boxes, known as prismatic cells. Typical sizes are 5 × 34 × 50 mm and 10 × 34 × 50 mm, along with a variety other standard sizes.
The third configuration is flat foil pouches very similar to chewing-gum packages, generally known as lithium-polymer cells/batteries. Typical sizes are per prismatic cells, but a wide variety of additional sizes abound within the marketplace.
Industry verbiage typically refers to cylindrical and prismatic cells as being “traditional” Li ion and pouch cells as being “Li polymer” or “Li poly” or “pouch” batteries
Manufacturing of traditional Li ion versus Li poly is vastly different. For Li ion, a vast array of expensive automated equipment and tooling is required to produce the cells. The cylindrical cell configuration has become the workhorse of the industry, being the most commonly used in a large variety of applications.
It’s a different case with Li poly cells. Being a pouch cell, tooling and equipment is less expensive for manufacture. Overall investment in setting up a cell assembly process also is less costly. Manufacturing a Li-poly foil pouch is much less intensive than a traditional Li-ion “can” cell. And, since overall tooling and equipment costs are much lower, a designer has a larger variety of pouch-cell sizes to choose from. The Li-poly construction allows for odd shapes and even bendable batteries to be manufactured.
From a chemistry perspective, traditional Li ion is the same/similar to Li poly. Both have various formulations for improved life, energy density, safety, and overall performance characteristics. All reputable manufacturers of Li-ion and Li-poly cells undergo a series of certification testing to confirm safety of design and manufacturing.
However, for Li-poly cells, compliance exceptions exist due to the foil-pouch configuration. With the absence of a metal structure, the specific requirements for crush, impact, and projectile aren’t considered.
a battery pack using Li-poly cells must be constructed differently than traditional Li ion. The cells must be secured or unitized in a manner to prevent any movement within the battery pack.
Traditional Li ion uses a metal can as the enclosure, providing external support. However, this sealed metal can may act as a pressure vessel during abusive conditions.
Use of cylindrical cells may not provide the highest capacity since all the internal space within the battery compartment
In terms of environmental issues, all Li-ion and Li-poly cells/batteries need to be properly recycled
In the end, Li-poly offers several advantages over Li-ion in portable applications
Tomi Engdahl says:
What’s Missing In EUV?
The gaps include mask inspection and pellicles.
https://semiengineering.com/whats-missing-in-euv/
Extreme ultraviolet (EUV) lithography is expected to move into production at 7nm and/or 5nm, but as previously reported, there are some gaps in the arena.
At one time, the power source was the big problem, but that appears to be solved in the near term. Now, a phenomenon called stochastic effects, or random variations, are the biggest challenge for EUV lithography.
But at most events, the industry says the biggest gap is actinic pattern mask inspection for EUV, followed by EUV pellicles. There are other gaps, but those are the bigger ones.
Both mask inspection and pellicles are part of the EUV mask infrastructure, which is a key part of EUV lithography. So perhaps it’s time to take a quick look at the EUV mask supply chain. Things could easily change, but here’s the latest in the arena.
Tomi Engdahl says:
Understanding Portable Stimulus
https://www.eeweb.com/profile/ahamid/articles/understanding-portable-stimulus
In the not-so-distant future, PS will become the dominant verification methodology at the higher levels of integration and complexity where existing technologies face limitations.
The focus of this standard is not stimulus, and the stimulus itself is not portable; other than these small points, “Portable Stimulus” is a perfect name, although “Functional Intent Specification Standard” would have been much more appropriate.
PS encapsulates a verification technology that fixes some bugs with SystemVerilog and the Unified Verification Methodology (UVM). Today, testbenches are not reusable or composable. They cannot target different verification engines easily or handle processors. PS is not intended as a replacement for UVM, but extends verification concepts beyond intellectual property (IP) and sub-systems up to the full System-on-Chip (SoC) level and the hardware and software interface. In the not-so-distant future, PS will become the dominant verification methodology at the higher levels of integration and complexity where existing technologies face limitations.
For those familiar with UVM, think of PS as a more powerful method to produce complex, multi-threaded sequences. Instead of just thinking about stimulus sequences, extend it to a model describing how the system should behave when subjected to that sequence. This model, called “verification intent,” encompasses the notions of sequence, scoreboard, and coverage into one unified model.
Next, PS provides an abstraction, or indirection, from the engines upon which a test will run.
Today, engineers making use of the predecessors of PS are system integrators, validation teams, and — in some cases — architects. UVM ran out of steam for them a long time ago. As blocks get bigger and more complex, larger groups of people can benefit from this technology.
Tomi Engdahl says:
U.S. Pulls Back From Brink of Trade War With China
https://www.eetimes.com/document.asp?doc_id=1333309
U.S. President Donald Trump has suspended a plan to impose tariffs on $150 billion worth of Chinese imports, pulling back from the brink of a trade war that chipmakers and others feared could prove costly on both sides.
Tomi Engdahl says:
Microsemi Deal May Spur Broader ReRAM Adoption
https://www.eetimes.com/document.asp?doc_id=1333298
A deal by Microsemi to license non-volatile resistive RAM (ReRAM) technology from Crossbar could be a significant catalyst paving the way for wider adoption of ReRAM, according to memory industry analysts.
“This is one of those things that kind of feeds off itself,” said Jim Handy, principal at Objective Analysis. “It could cause a snowball effect for Crossbar.”
Microsemi — which is in the process of being acquired by Microchip Technology — said earlier this week it agreed to license Crossbar’s ReRAM intellectual property to integrate into next-generation products manufactured at the 1x nm process node.
Tomi Engdahl says:
Wireless Bandpass Filters Build on Metamaterials
http://www.mwrf.com/materials/wireless-bandpass-filters-build-metamaterials?NL=MWRF-001&Issue=MWRF-001_20180521_MWRF-001_572&sfvc4enews=42&cl=article_1_b&utm_rid=CPG05000002750211&utm_campaign=17416&utm_medium=email&elq2=25b4c328fcf7444aaa30bfadef862b29
These second- and third-order bandpass filters leverage metamaterial resonators for low passband insertion loss and high out-of-band rejection for wireless applications at 2.4 GHz.
Tomi Engdahl says:
TSMC world’s 3rd largest IC supplier in Q1
http://focustaiwan.tw/news/aeco/201805190013.aspx
Taipei, May 19 (CNA) Taiwan Semiconductor Manufacturing Co. (TSMC) was the third largest integrated circuit supplier in the world in the first quarter of the year, unchanged from recent quarters, according to market information advisory firm IC Insights.
A research report released by IC Insights showed TSMC posting first-quarter sales of US$8.47 billion, up 13 percent from a year earlier, to retain the No. 3 spot in the rankings.
Tomi Engdahl says:
Global, U.S. electronics supply chains see healthy midyear business conditions
https://electroiq.com/blog/2018/05/global-u-s-electronics-supply-chains-see-healthy-midyear-business-conditions/
The first quarter of this year was very strong globally, with growth across the entire electronics supply chain. Although Chart 1 is based on preliminary data, every electronics sector expanded – with many in double digits. The U.S. dollar-denominated growth estimates in Chart 1 have effectively been amplified by about 5 percent by exchange rates (as stronger non-dollar currencies were consolidated to weaker U.S. dollars), but the first quarter global rates are very impressive nonetheless.
Tomi Engdahl says:
China Clears $18 Billion Toshiba Memory Sale
https://www.eetimes.com/document.asp?doc_id=1333299
China’s antitrust regulators approved the $18 billion of Toshiba’s memory chip unit to a consortium led by Bain Capital, clearing the way for the deal to be finalized by June 1, Toshiba said.
Approval by China’s Ministry of Commerce (Mofcom) was the last remaining hurdle to completion of the deal. In addition to Bain, a U.S. private equity firm, the consortium also includes Apple, Dell and SK hynix.
Tomi Engdahl says:
200mm Fab Crunch
https://semiengineering.com/200mm-fab-crunch/
Shortages of used equipment and lower margins mean this problem isn’t getting solved anytime soon.
Growing demand for analog, MEMS and RF chips continues to cause acute shortages for both 200mm fab capacity and equipment, and it shows no sign of letting up.
Today, 200mm fab capacity is tight with a similar situation projected for the second half of 2018 and perhaps well into 2019. In fact, 2018 will likely represent the third consecutive year that 200mm fab capacity will be tight. The same holds true for 200mm equipment.
In 200mm, there are a number of complicated dynamics. Among them:
• IDMs and fabless design houses hope to meet demand for chips made in 200mm fabs. Yet it’s unclear if vendors can meet all demand, as worldwide 200mm fab capacity is expected to remain tight now and into the future.
• In response, GlobalFoundries, Samsung, SMIC, TowerJazz, TSMC, UMC and others are scrambling to add or find 200mm capacity. Meanwhile, SkyWater Technology, a new foundry vendor, has entered the 200mm fray.
• Even if there is 200mm capacity available, the industry is stuck as it is unable to find enough suitable 200mm fab equipment in the market.
• Then, unable to secure enough 200mm capacity or equipment, some chipmakers are re-thinking their plans about building new 200mm fabs. Instead, they may build 300mm plants.
Tomi Engdahl says:
Electromagnetic Crosstalk Considerations In Low Power Designs
https://semiengineering.com/electromagnetic-crosstalk-considerations-in-low-power-designs/
A method for shrinking the size and power of designs, with less margin and fewer decaps.
Power consumption continues to be a critical design metric in high-performance mobile electronics. In order to meet the aggressive power budget targets, chips today need to operate at extremely low power levels, which increases the critical signals’ susceptibility to electromagnetic (EM) crosstalk effects.
Because a low-power SoC has much smaller noise margin, small amounts of switching activities that cause ringing on the power delivery network (PDN) can adversely affect the chip’s performance.
Tomi Engdahl says:
How To Build Functional Safety Into Your Design From The Start
https://semiengineering.com/how-to-build-functional-safety-into-your-design-from-the-start/
Accelerating time to market in safety-critical markets.
The focus on functional safety IP is rapidly growing and we’re seeing this growth not just in automotive but in many other markets including, avionics, medical, industrial and railways, where systems need to efficiently identify and mitigate the occurrences of faults, and where more confidence is required with respect to the design practises employed for the development of IP.
Currently, many processors are not designed with functional safety standards in mind and the use of these can lead to lengthy and costly qualification processes for safety relevant applications.
Building a robust functional safety process
When designing functional safety related products, one must follow the so-called product life-cycle process. Such a process is often far more structured and formal compared to other standard development processes.
Tomi Engdahl says:
Ultra-Low Power Timers Cut Effects of Leakage Currents
http://www.powerelectronics.com/pmics/ultra-low-power-timers-cut-effects-leakage-currents?NL=ED-003&Issue=ED-003_20180523_ED-003_585&sfvc4enews=42&cl=article_1_b&utm_rid=CPG05000002750211&utm_campaign=17438&utm_medium=email&elq2=250eddf8b7a148c6b581771cbf4352c1
A family of ultra-low-power system timers is intended specifically for reducing power during system sleep time. These ICs, called nanotimers, provide various methods for a system to enter a no-power mode, including a simple control signal from a local microcontroller to indicate the start of the off cycle. The system timer then takes care of starting up the circuit after a preprogrammed amount of time.
The TPL5010 nanotimer is a low power timer with a watchdog feature ideal for system wake-up in duty-cycled or battery-powered applications. In such systems, the µC timer can be used for system wake-up, but if the timer sleep current is high, up to 60% to 80% of the total system current can be consumed by the µC timer in this sleep mode and as explained later, this phenomena gets worse as IC process technology evolves. Consuming only 35nA, the TPL5010 can replace the functionality of the µC timer and allow the system to be placed in a much lower power mode. Such power savings enable the use of significantly smaller batteries, making it well suited for energy harvesting or wireless sensor applications. The TPL5010 provides selectable timing intervals from 100ms to 7200s and is designed for interrupt-driven applications. Some standards (such as EN50271) require implementation of a watchdog for safety and the TPL5010 realizes this watchdog function at almost no additional power consumption. The TPL5010 is available in a 6-pin SOT23 package.
Tomi Engdahl says:
Startup, Imec Shrink SRAM Cells
Device uses novel vertical nanowire transistor
https://www.eetimes.com/document.asp?doc_id=1333312
A startup led by one of the pioneers of flash memory worked with the Imec research institute to design the smallest SRAM cells to date. The 0.0205 mm2 and 0.0184 mm2 6T-SRAM cells use a vertical gate-all-around transistor being developed by Unisantis as a building block for tomorrow’s leading-edge chips.
The work was one of a handful of announcements at the opening day of the Imec Technology Forum. Other news here includes work on more accurate indoor location over Bluetooth, a dense lab-on-a-chip and a camera-free approach to eye tracking, all developed solely by Imec.
Tomi Engdahl says:
Samsung Plans 3nm Gate-All-Around FETs in 2021
https://www.eetimes.com/document.asp?doc_id=1333318
Samsung Electronics laid out plans to bring to mass production in 2021 the architectural successor to FinFETS, gate-all-around (GAA) transistors, at the 3nm node. The South Korean giant also reaffirmed plans to begin 7nm production using extreme ultraviolet (EUV) lithography in the second half of this year at its annual foundry technology forum here Tuesday (May 22).
GAA technology has been under development since the early 2000s by Samsung and other firms. GAA transistors are field-effect transistors (FET) that feature a gate on all four sides of the channel to overcome the physical scaling and performance limitations of FinFETs, including supply voltage.
Tomi Engdahl says:
Rising 8-inch foundry quotes putting pressure on IC designers
https://www.digitimes.com/news/a20180522PD208.html
Foundry houses raising quotes for 8-inch capacity amid tight supply are creating pressure on IC designers’ profit margins in the short term, but in the long run could be a stabilizing factor in terms of profitability deterring downstream clients from asking for unreasonable price reductions, according to industry sources.
Robust chip demand for automotive electronics, IoT and consumer electronics applications has been filling China- and Taiwan-based foundries’ 8-inch fab capacities, the sources indicated. Orders for chips including MCUs, analog chips, LCD driver ICs and MOSFETs have been ramping up for these applications.
Tomi Engdahl says:
Bloomberg:
Sources: Apple’s manufacturing partner TSMC has started mass production of 7nm processors for iPhones launching later this year — – More-efficient 7-nanometer processors coming later this year — Samsung is also working on the next-generation chip technology
Next Generation iPhone Chips Go Into Production
https://www.bloomberg.com/news/articles/2018-05-23/apple-partner-tsmc-is-said-to-start-making-chips-for-new-iphones
Apple Inc. manufacturing partner Taiwan Semiconductor Manufacturing Co. has started mass production of next-generation processors for new iPhones launching later this year, according to people familiar with the matter.
The processor, likely to be called the A12 chip, will use a 7-nanometer design that can be smaller, faster and more efficient than the 10-nanometer chips in current Apple devices like the iPhone 8 and iPhone X, the people said.
In April, TSMC, the world’s largest contract chipmaker, said it started mass-producing 7-nanometer processors, but didn’t disclose it was building them for a specific partner.
Tomi Engdahl says:
Quantum Effects At 7/5nm And Beyond
https://semiengineering.com/quantum-effects-at-7-5nm/
At future nodes there are some unexpected behaviors. What to do about them isn’t always clear.
Quantum effects are becoming more pronounced at the most advanced nodes, causing unusual and sometimes unexpected changes in how electronic devices and signals behave.
Quantum effects typically occur well behind the curtain for most of the chip industry, baked into a set of design rules developed from foundry data that most companies never see. This explains why foundries and manufacturing equipment companies so far are the only ones that have been directly affected, and they have been making adjustments in their processes and products to account for those effects. But as designs shrink to 7/5nm and beyond, quantum effects are emerging as a more widespread and significant problem, and one that ultimately will affect everyone working at those nodes.
“Quantum effects happen in the device as soon as certain device dimensions become very small, due to scaling and its associated requirements,”
Tomi Engdahl says:
Choosing A Format For The Portable Stimulus Specification
Merits and challenges of alternative input formats.
https://semiengineering.com/choosing-a-format-for-the-portable-stimulus-specification/
The Accellera Systems Initiative is currently defining a Portable Stimulus Specification (PSS) standard for verification models that can be used to generate appropriate tests for all levels and platforms automatically. The current draft of the standard includes two alternative input formats for these models.
Choosing a Format for the Portable Stimulus Specification
https://www.mentor.com/products/fv/resources/overview/choosing-a-format-for-the-portable-stimulus-specification-ecaa1eb1-c7a0-472e-b9ba-cb0443768c21?cmpid=10166?cmpid=10168
Tomi Engdahl says:
Multi-Die Packaging And Thermal Superposition Modeling
https://semiengineering.com/multi-die-packaging-and-thermal-superposition-modeling/
Thermal limits and benefits offered by different packaging options.
Tomi Engdahl says:
North American Semiconductor Equipment Industry Posts April 2018 Billings
http://www.semi.org/en/north-american-semiconductor-equipment-industry-posts-april-2018-billings
Tomi Engdahl says:
May 22, 2018
Semi Capex Forecast to Exceed $100B for the First Time in 2018
IC Insights raises its full-year spending growth forecast for this year from 8% to 14%.
http://www.icinsights.com/news/bulletins/Semi-Capex-Forecast-To-Exceed-100B-For-The-First-Time-In-2018/
IC Insights recently released its May Update to the 2018 McClean Report. This Update included a look at the top-25 1Q18 semiconductor suppliers, a discussion of the 1Q18 IC industry market results, and an update of the 2018 capital spending forecast by company.
Tomi Engdahl says:
Analog Migration Equals Redesign
https://semiengineering.com/analog-migration-equals-redesign/
Advanced nodes are forcing design teams to make tradeoffs at each new node and with each new process.
Analog design has never been easy. Engineers can spend their entire careers focused just on phase-locked loops (PLLs), because to get them right the functionality of circuits need to be understood in depth, including how they respond across different process corners and different manufacturing processes.
In the finFET era, those challenges have only intensified for analog circuits. Reuse, for example, is a common practice in the digital world, but it hasn’t applied to analog design for quite a number of process nodes because analog circuits don’t scale beyond a certain point.
Technically, there are several reasons why this is the case. “High-precision analog designers would not feel comfortable with reuse and migration because there is no tool in analog, for example, that will guarantee timing closure,” said Mick Tegethoff, director of product marketing and management for the analog/mixed-signal verification business unit at Mentor, A Siemens Business. “We see the traditional analog designer spend a lot of time really understanding the functionality of that design.”