Electronics trends for 2015

Chip designs that enable everything from a 6 Gbit/s smartphone interface to the world’s smallest SRAM cell will be described at the International Solid State Circuits Conference (ISSCC) in February 2015. Intel will describe a Xeon processor packing 5.56 billion transistors, and AMD will disclose an integrated processor sporting a new x86 core, according to a just-released preview of the event. The annual ISSCC covers the waterfront of chip designs that enable faster speeds, longer battery life, more performance, more memory, and interesting new capabilities. There will be many presentations on first designs made in 16 and 14 nm FinFET processes at IBM, Samsung, and TSMC.

There is push to go to even smaller processes, and it seems that next generation of lithography equipment are started to being used. Earlier expectation was for chipmakers to use traditional immersion lithography for production of 10 nm chip, but it seems that extreme ultraviolet (EUV) scanners that allows allow scaling to 10 nm or even smaller is being used. TSMC to Use EUV for 7nm, Says ASML. Intel and TSMC have been injecting money in ASML to push process technology.

2015 promises to see initial FPGA product releases and (no doubt) a deluge of marketing claims and counter-claims. One thing is certain: 2015 will not be boring. There will be FPGA products that use processes beyond 20nm, for example Altera and  Xilinx have committed to use the TSMC 16nm FinFET technology. There is  publicized (and rumored) race to get to production at 14nm has seen time frames for initial samples move into 2015. However, with both FPGA companies reporting gross margins of close to 70 percent, it would be possible for either company to take an initial hit on margin to gain key socket wins.

It seems that the hardware becomes hot again as Wearables make hardware the new software. Apple invest its time when it released the Apple Watch last quarter, going up against the likes of Google’s Android Wear and others in the burgeoning wearables area of design. Once Apple’s bitten into a market, it’s somewhat a given that there’s good growth ahead and that the market is, indeed, stable enough. As we turn to 2015 and beyond  wearables becomes an explosive hardware design opportunity — one that is closely tied to both consumer and healthcare markets. It could pick up steam in the way software did during the smartphone app explosion.

There will be more start-up activity within hardware sector. For recent years, the software has been on the main focus on the start-ups, and the hardware sector activity has been lower. Hardware sector has seem some start-up activity with many easy to use open hardware platforms became available (make development of complex devices easier and reachable for smaller companies). The group financing (Kickstarter, Indiegogo, etc.) have made it possible to test of new hardware ideas are market-worthy and get finance to get them to production.

EEs embrace hackathons aand accelerators. Design 2.0 is bubbling up in the engineering community, injecting new energy into the profession. In many ways, it’s the new Moore’s Law. Easy to use open hardware development platforms have made it possible to design working hardware device prototypes within hackathons.

Silicon Startups Get Incubator article tells that there will be new IC start-up activity as semiconductor veterans announced plans for an incubator dedicated to helping chip startups design their first prototypes. Keysight, Synopsys, and TSMC have signed exclusive deals to provide tools and services to the incubator. Silicon Catalyst aims to select its first batch of about 10 chip startups before April.

1,206 Comments

1. February 12, 2015 at 4:06 pm

   Tomi Engdahl says:

   Eye Diagram Basics: Reading and applying eye diagrams
   http://www.edn.com/design/test-and-measurement/4389368/Eye-Diagram-Basics-Reading-and-applying-eye-diagrams

   Accelerating data rates, greater design complexity, standards requirements, and shorter cycle times put greater demand on design engineers to debug complex signal integrity issues as early as possible. Because today’s serial data links operate at gigahertz transmission frequencies, a host of variables can affect the integrity of signals, including transmission-line effects, impedance mismatches, signal routing, termination schemes, and grounding schemes. By using an oscilloscope to create an eye diagram, engineers can quickly evaluate system performance and gain insight into the nature of channel imperfections that can lead to errors when a receiver tries to interpret the value of a bit.

   An eye diagram is a common indicator of the quality of signals in high-speed digital transmissions. An oscilloscope generates an eye diagram by overlaying sweeps of different segments of a long data stream driven by a master clock.

   In an ideal world, eye diagrams would look like rectangular boxes. In reality, communications are imperfect, so the transitions do not line perfectly on top of each other, and an eye-shaped pattern results. On an oscilloscope, the shape of an eye diagram will depend upon various types of triggering signals, such as clock triggers, divided clock triggers, and pattern triggers. Differences in timing and amplitude from bit to bit cause the eye opening to shrink.

   A properly constructed eye should contain every possible bit sequence from simple alternate 1’s and 0’s to isolated 1’s after long runs of 0’s, and all other patterns that may show up weaknesses in the design.

   Although in theory eye diagrams should look like rectangular boxes, the finite rise and fall times of signals and oscilloscopes cause eye diagrams

   Eye diagrams provide instant visual data that engineers can use to check the signal integrity of a design and uncover problems early in the design process. Used in conjunction with other measurements such as bit-error rate, an eye diagram can help a designer predict performance and identify possible sources of problems.

   Reply
2. February 12, 2015 at 4:08 pm

   Tomi Engdahl says:

   Perform five common debug tasks with an oscilloscope
   http://www.edn.com/design/test-and-measurement/4431104/1/Perform-five-common-debug-tasks-with-an-oscilloscope

   From input devices such mice and keyboards to smart homes and streaming media boxes, consumers demand the convenience of wireless. That demand has forced modern embedded systems to bear little resemblance to those from even a few years ago. Most system designs in production or in development today include at least one form of wireless capability such as Wi-Fi, Bluetooth, or ZigBee.

   Testing these systems means that designers must be capable of working in a mixed domain environment, from DC to RF, with analog and digital signals, and serial and parallel buses. To meet this need, test equipment vendors are responding with integrated oscilloscopes that provide a complete set of bench instruments in a single portable package. Such oscilloscopes are capable of handling a range of common debug and verifications tasks, from detecting sources of radiated EMI to validating a switching power supply design.

   we found that in addition to their oscilloscopes, engineers reported that they turned to the following instruments several times per month:
   Sponsor video, mouseover for sound

   Digital voltmeter: 87%
   Function generator: 68%
   Spectrum analyzer: 45%
   Logic analyzer: 33%
   Protocol analyzer: 15%

   Reply
3. February 13, 2015 at 7:26 am

   Tomi Engdahl says:

   Reliability Definition Is Changing
   http://semiengineering.com/reliability-definition-is-changing/

   Complexity and vulnerabilities in systems are raising questions about what constitutes a fully functional design.

   Since the invention of the integrated circuit, reliability has been defined by how long a chip continues to work. It either turned on and did what it was designed to do, or it didn’t. But that definition is no longer so black-and-white. Parts of an SoC, or even an IP or memory block, can continue to function while other parts do not. Some may work intermittently, or at lower speeds. Others may increase in temperature to the point where they either shut down or slow down.

   This raises some interesting issues across a wide swath of the electronics industry, ranging from legal liability, to design goals for power and performance, to what differentiates any functioning system—especially critical systems—from those that are non-functional or marginally functional. Just as systems are getting more complex, so are the metrics surrounding them.

   “This is no longer just about aging of a system,” said Frank Schirrmeister, group director for product marketing for the System Development Suite at Cadence. “We’re starting to see more generalized questions like whether the system is meeting the expectations set at inception. If you have thermal issues, the system may be doing what it’s supposed to do. There is complex logic to turn it on and off and you’ve done performance validation to make sure it all works. But if you’re running a heavy compute load for six minutes, with thermal effects it may slow down. So the processor is actually going down in performance over time. How long can you run that before the performance is not what you expect?”

   The bigger picture
   Reliability measurements don’t stop with a single device, either. Increasingly it involves one device connected to one or more other devices, and reliability may be as dependent on those other devices as the design of the initial device. Consider smart cars, for example, which can communicate with other smart cars to prevent collisions around blind curves. But what happens if one of the other cars fails to communicate and alert the oncoming car? That also can happen even if both communication systems are working, but one car is newer than another and uses a different communications protocol.

   “Embedded devices are changing in the way they are put together,”

   That big picture extends well beyond the device being designed and tested, even for something as simple as a smart garage door opener, which can be controlled by a smart phone over the Internet. “The device now has three elements—the edge node, which is under mechanical or local control, the central node, which interacts with the edge node, and the application that runs on the mobile client and interacts with the device over a hub.”

   A problem in any one of those areas can affect reliability in the other two. And when problems do occur, it can be difficult to determine where the fault is. It might be the hardware, it might be the software that controls the hardware, or it might be in the communication infrastructure that is out of the control of everyone involved in creating the device. And it may be temporary or permanent.

   Another factor that can affect performance—and therefore device reliability, as in the case of two cars communicating through the cloud—is data access.

   Where tools fail…sort of
   Much of this fits into an as-yet undefined gray area. What’s not so obvious to the outside world, and sometimes even in the design space, is what happens when tools for developing chips evolve into their own gray area.

   “Less well understood is the result of incomplete functional verification,”

   Murphy noted there are also issues when devices are used across markets. So big application processors may not need to last more than a few years, but that same technology needs to last 10 or 20 years if it is included in an automotive infotainment system. It also has to work in much more harsh environments.

   “Due to aggressive time to market schedules, customers are expecting guarantees that these IP blocks work on the first instantiation,”

   Security
   And finally, even if all of the technology works as planned, there are gaping security holes in designs at every process node and in almost every IoT design—even if it’s only what a well-design piece of hardware or software is connected to. It’s obvious a device that is compromised is no longer reliable. But a device that can be compromised isn’t reliable, either.

   There is a frenzy of activity in the security world these days, stemming from breaches at banks and retailers, to government countermeasures for cybercrime and cyberwarfare. It has steadily been spilling over into the M&A world

   All of the processor companies have been active in securing their cores. ARM already had its TrustZone technology for compartmentalizing memory and processes. Intel has taken a similar tack with its processor architecture, restricting access to the core architecture. And both Synopsys and Imagination Technologies, which make the other popular processors, have taken steps to seal off the processors from intrusions. But the real challenge is that the IoT opens communications through many channels—from I/O for connectivity to multiple networks to multiple layers of software to on- and off-chip memory and storage.

   Even antennas are subject to security breaches, and there are an increasing number of them inside any connected electronics.

   “One is interference. The second is coupling. The third is susceptibility. All of this can do damage on the chip.”

   Conclusion
   While engineers can only control their own piece of the ecosystem, reliability may be harder to define within those bounds in the future. Each piece needs to be engineered as best as it possibly can, but that doesn’t mean it will be reliable in the real world because there are so many other factors that can affect it.

   “You can have a part that is 99.9999999% reliable, but the failure may come from something that is 99.9% reliable,” said Drew Wingard, chief technology officer at Sonics. “The question is which ones are most likely to affect you. Even with ISO 26262 (Road Vehicles – Functional Safety), there is very little focus on repair or extension of life. There is a report before something bad happens, but there is nothing about recovering from errors or correcting them.”

   Reply
4. February 13, 2015 at 8:57 am

   Tomi Engdahl says:

   What…You’re Using Lasers for Area Heating?
   http://www.eetimes.com/author.asp?section_id=36&doc_id=1325651&

   Come warm your hands by the laser beam? An array of tiny VCSELs can be used as a high-density, controllable heat source.

   But using lasers for area heating seems to be a contrary to their virtues.

   That’s why I was surprised when I saw the story on the benefits of “photonic” heating in Laser Focus World, “High-power VCSEL arrays make ideal industrial heating systems.” By setting up an array of hundreds of vertical-cavity surface-emitting lasers (shown below), you not only obviously get a different source of heat, but you attain some other unique operating advantages that are non-obvious and beneficial. Yes, the author’s company (Photonics Aachen, part of Philips Photonics) makes this system and so he is somewhat biased, but nonetheless, it’s worth seeing what he has to say.

   In contrast to conventional edge-emitting laser diodes, the collection of vertical-emitting laser diodes (each with a diameter of 30-40 μmeter) can be fabricated in one pass of wafer processing, including test, with about 500 VCSELs per mm2 of a die. Since each laser emits 1 to 10 mW, a 2 × 2 mm chip array holding 2,000 VCSELs can emit over 20 W of infrared power — that’s impressive power density for this technology.

   All this is impressive, but why bother when you can use standard halogen lamps, for example, to get the IR heating? First, the VCSEL IR brightness is 100 to 1,000 greater than halogens, with a lifetime of over than 10,000 hours, the author says

   The VCSEL array can be switched on and off in milliseconds for precise dosing control, since it does not have the thermal lag of a halogen emitter or similar sources.

   VCSEL array is well suited to highly targeted, localized zones, where the material to be heated may not be homogenous

   Reply
5. February 13, 2015 at 9:05 am

   Tomi Engdahl says:

   CMOS Image Sensors Surpassing Moore’s Law
   3-D sensors quickly evolving from TSVs to Cu-Cu bonding
   http://www.eetimes.com/document.asp?doc_id=1325655&

   Complementary metal oxide semiconductor (CMOS) imaging chips are becoming the industry’s leader in advanced process technology — instead of the traditional leaders (processors and memory) — thanks to strong demand for CMOS imaging chips in everything from smartphones to tablets to medical equipment and automobiles. Apparently, now the innovation surpasses Moore’s Law, says analyst firm Yole Développement.

   Imaging was once done by film, but with the advent of solid-state sensors the technology breakthroughs seem to be growing exponentially, doubling with each new innovation (see slide 1), thus surpassing the traditional interpretation of Moore’s Law, argues Yole Développement (Lyon, France) in a new paper. Yole calls this effect “More than Moore.”

   At the pinnacle of this growth is 3-D stacking, the allure of which for imaging chips is downsizing the chip while simultaneously packing more pixels per unit size, thus one-upping processors and memory, which are only now perfecting the through-silicon-via (TSV) notably with Micron’s Hybrid Memory Cube. CMOS imaging chips, however, are one-step-ahead perfecting copper-to-copper bonding of wafers containing the interconnection metallization for pixel arrays and the digital processing layers of the imaging chip on separate layers below the top (pixel) level.

   The CMOS imaging industry may make the 3-D TSV obsolete — before the processor and memory industry has even widely adopted it — by perfecting a wafer bonding technique that allows the connection between layers to be made with copper-to-copper (Cu-to-Cu) interconnects nearly as small as regular vias.

   Sony is still leading the CMOS imaging industry, but giants like Samsung are in close pursuit. Also big players like Panasonic are forming joint ventures

   The stakes are huge. The CMOS image sensor market will reached the historic $10 billion milestone in 2015, according to Yole, and with new applications popping up in automotive, medical and surveillance, while smartphones begin adopting high-definition front facing cameras, the industry is likely to hit the $16 billion mark by 2020

   Reply
6. February 13, 2015 at 9:07 am

   Tomi Engdahl says:

   Samsung Pumps $3.6bn into OLED Panel Productions
   http://www.eetimes.com/document.asp?doc_id=1325672&

   South Korea’s Samsung Display has unveiled plans to invest $3.6 billion into making organic light-emitting diode (OLED) panels to support the company’s parent Samsung Electronics Co Ltd aims to boost components sales to offset weaker smartphone earnings.

   The new production line is expected to make medium and small-sized OLED displays for consumer electronics devices like smartphones and tablets. The investment will be made from 2015 to 2017.

   Reply
7. February 22, 2015 at 1:31 pm

   Tomi Engdahl says:

   Store Digital Files for Eons in Silica-Encased DNA
   http://hackaday.com/2015/02/21/store-digital-files-for-eons-in-silica-encased-dna/#comment-2449052

   If there’s one downside to digital storage, it’s the short lifespan. Despite technology’s best efforts, digital storage beyond 50 years is extremely difficult. [Robert Grass, et al.], researchers from the Swiss Federal Institute of Technology in Zurich, decided to address the issue with DNA.

   DNA is not always replicated perfectly

   They decided to use Reed-Solomon codes, which have been utilized in error-correction for many storage formats from CDs to QR codes to satellite communication.

   Accelerated aging experiments, where the DNA was exposed to sustained temperatures up to 70ºC for 1 week, compared DNA encased in silica to DNA on other dry mediums, like paper or polymer. After one week, significant degradation occurred in all but the silica-encapsulated DNA. The silica provided complete isolation from the external environment.

   Glassed-in DNA makes the ultimate time capsule
   http://www.newscientist.com/article/mg22530084.300-glassedin-dna-makes-the-ultimate-time-capsule.html#.VOnZ5S69h2m

   Reply
8. February 23, 2015 at 7:39 am

   Tomi Engdahl says:

   Will Energy-Harvesting 3D Printed Trees Charge Your Smartphone?
   http://www.eetimes.com/document.asp?doc_id=1325718&

   Scientists at the Technical Research Centre of Finland (VTT) have developed a prototype of a 3D printed tree that harvests solar energy using organic solar cells and kinetic energy from vibrations in its surrounding environment.

   The artificial energy-harvesting trees, which can be infinitely replicated, work indoors or outdoors by storing the energy they harvest and turn it into electricity to power small devices such as mobile phones, humidifiers, thermometers and LED light bulbs.

   The ‘leaves’ of the energy-harvesting tree are flexible, patterned organic solar panels made using a mass production technique developed by VTT on a printing process.

   Reply
9. February 23, 2015 at 9:20 am

   Tomi Engdahl says:

   IoT will dominate Embedded World
   http://www.edn.com/electronics-blogs/embedded-insights/4438693/IoT-will-dominate-Embedded-World?_mc=NL_EDN_EDT_EDN_funfriday_20150220&cid=NL_EDN_EDT_EDN_funfriday_20150220&elq=4b9f9db4b24944d8b912e0113077acfc&elqCampaignId=21749

   Billed as the world’s largest gathering of embedded developers and their suppliers, Embedded World opens next week in Germany to anticipated crowds of more than 27,000 designers and 900 exhibitors, and the Internet of Things (IoT) will be taking center stage. Unlike the recent CES, however, this show won’t be filled with health-monitoring wristwatches and televisions that watch you watch them. Embedded World promises to be filled with products and practical tips to help the serious developer merge Internet connectivity with local intelligence in industrial, automotive, and enterprise applications.

   Companies have also started to tip their hand as to what they will be highlighting at the show, and the IoT is a common theme. Press conferences are scheduled for major announcements by:

   AAEON
   Adlink
   Cadence
   CAN in Automation
   cognatec
   Freescale Semiconductor
   Kaspersky
   Kontron
   Lynx Software Technologies
   Rohde & Schwarz
   Texas instruments
   TQ-Systems
   Wind River

   These represent major players in semiconductors, boards, software, tools, and systems design, all aiming to make their mark in IoT development.

   Clearly the Internet of Things is a major topic of discussion in the industry and, given that every IoT device is also an embedded system design, the importance of IoT at Embedded World is not surprising. Even the US Congress and President are getting into the discussion with hearings on things like privacy and cyber security, both of which are critical issues for the IoT’s future. But with all the popular press focusing on the gimmicky side of the IoT and its marginally useful home automation and me-too fitness monitors, it’s easy to become cynical about the topic.

   Reply
10. February 23, 2015 at 9:22 am

    Tomi Engdahl says:

    Best Practices in PCB Documentation
    http://aa-pcbassembly.com/design-insights/best-practices-pcb-documentation/?utm_source=Promotion&utm_medium=eNewsletter&utm_content=Documentation&utm_campaign=Aspen%20Labs

    PCB manufacturers and assembly houses have the important responsibility of taking someone’s idea and turning it into a reality. CAD files, including Gerbers, are important in conveying exactly what is wanted, but it’s the personal communication that ensures what is envisioned is what is made. Different phases of the manufacturing process require different files and information

    Board manufacturers require, at a bare minimum, the Gerber files for your board. With this information, they can typically fabricate a board that looks like the intended design. However, the manufacturer will have to make assumptions on several things, including the laminate and finish to be used.

    Reply
11. February 23, 2015 at 9:23 am

    Tomi Engdahl says:

    Annotate oscilloscope displays for better documentation
    http://www.edn.com/design/test-and-measurement/4438631/Annotate-oscilloscope-displays-for-better-documentation?_mc=NL_EDN_EDT_EDN_weekly_20150219&cid=NL_EDN_EDT_EDN_weekly_20150219&elq=0171beecabd0436ba7a9305cac9747fe&elqCampaignId=21725

    Has anyone ever shown you an oscilloscope screen image that left you wondering what the waveform represented? Without proper documentation, the waveform itself may be meaningless. By adding annotations to an oscilloscope screen, you can not only display relevant information, you can keep that documentation stored on the screen and it will be visible if you make a screen capture.

    Modern digital oscilloscopes offer many tools to help you annotate the screen and store vital information in plain view. Those annotation tools include trace descriptors, screen axis labels, trace labels, and messages available in the oscilloscope. Annotation lets you create complete documentation of the screen images, which is then permanently attached to the graphic. Oscilloscopes from all major suppliers offer some form of trace and display annotation.

    Reply
12. February 23, 2015 at 9:27 am

    Tomi Engdahl says:

    Checklists: Do or die
    http://www.edn.com/electronics-blogs/benchtalk/4438643/Checklists–Do-or-die?_mc=NL_EDN_EDT_EDN_weekly_20150219&cid=NL_EDN_EDT_EDN_weekly_20150219&elq=0171beecabd0436ba7a9305cac9747fe&elqCampaignId=21725

    Lists. They’re part of life. TTD lists. Shopping lists. Reading lists. Wine lists. What about checklists? I’m very happy my airline pilot is using one, but what about the designers of my computer? What about you?

    As designers, we can become quite confident in our abilities to craft products that are reliable, safe, manufacturable, testable, and operable in a wide range of environments. Do we always get it 100% right? Well… Maybe not. Why not enlist “checklist power” to help achieve perfection? You don’t have to tell anyone if you don’t want to. It’ll be our little secret.

    Checklists have received some press in recent years, partly as a result of surgeon Atul Gawande’s books. Insightful engineering prof Henry Petroski blogged on the topic too.

    I’ve organized my general design checklist into eight sections:

    Component selection
    Environmental and power
    Testability
    Standards
    General and System
    SI
    PCB
    Prototype Checkout

    Reply
13. February 23, 2015 at 9:40 am

    Tomi Engdahl says:

    Save face with component checklists
    http://www.edn.com/electronics-blogs/benchtalk/4438651/Save-face-with-component-checklists?_mc=NL_EDN_EDT_EDN_today_20150218&cid=NL_EDN_EDT_EDN_today_20150218&elq=5b426e87d9f64fe68ca45eb42b78da13&elqCampaignId=21686

    We’ve talked about general design checklists previously. Now, let’s look at specific components, and how to keep the egg off your face because of bad choices.

    Remember though: this is hardly an all-encompassing checklist; more like just a few tips to keep you on your toes. Feel free to add your own ideas in the comments.

    Reply
14. February 23, 2015 at 9:55 am

    Tomi Engdahl says:

    Next-generation MOSFETs cut on-resistance
    http://www.edn.com/electronics-products/other/4438609/Next-generation-MOSFETs-cut-on-resistance?_mc=NL_EDN_EDT_EDN_productsandtools_20150216&cid=NL_EDN_EDT_EDN_productsandtools_20150216&elq=ee4392f90e1f4d53bdd27f6ac5829a22&elqCampaignId=21645

    Extending Infineon Technologies’ OptiMOS 5 portfolio of power MOSFETs are 80-V and 100-V variants optimized for high switching frequencies used in synchronous rectification applications for telecom and server power supplies, as well as industrial applications such as solar, low-voltage drives, and power adapters. OptiMOS 5 devices slash on-resistance by up to 45% for 80-V parts and up to 24% for 100-V parts compared to the previous generation.

    SiC MOSFET affords wide-bandgap advantages
    http://www.edn.com/electronics-products/other/4438592/SiC-MOSFET-affords-wide-bandgap-advantages?_mc=NL_EDN_EDT_EDN_productsandtools_20150216&cid=NL_EDN_EDT_EDN_productsandtools_20150216&elq=ee4392f90e1f4d53bdd27f6ac5829a22&elqCampaignId=21645

    A 1200-V, 20-A silicon-carbide power MOSFET from STMicroelectronics exploits the benefits of advanced wide-bandgap materials, achieving on-resistance of better than 290 mΩ all the way to the 200°C maximum operating junction temperature. Switching performance is also consistent over temperature, with highly stable turn-off energy and a total gate charge of 45 nC typical resulting in low conduction and switching losses.

    Reply
15. February 23, 2015 at 10:17 am

    Tomi Engdahl says:

    Wi-Fi network interference, analysis, and optimization
    http://www.edn.com/electronics-blogs/the-emc-blog/4438663/Wi-Fi-network-interference–analysis–and-optimization?_mc=NL_EDN_EDT_EDN_review_20150220&cid=NL_EDN_EDT_EDN_review_20150220&elq=13046a04ed09481bbfbbe17950cce9ee&elqCampaignId=21741
    One aspect related to EMC today is that, with the proliferation of embedded wireless systems in all imaginable products, comes the risk of increasing interference and resulting slowdown in data transfer. As we transition to a more mobile society, the number of Wi-Fi (home appliances and control) and Bluetooth-enabled devices (speakers, headset, watches, etc.) is rapidly increasing. Add to that the increasing number of residential control (lighting, thermostats, and security systems) utilizing wireless technology. But, more importantly, if you live or work in the city, it’s not unusual to have ten, or more, separate 2.4 GHz Wi-Fi access points (APs) or “hot spots” within range of your own system. Fortunately, I live out in the country, but my system can still “see” a half-dozen APs nearby. If two, or more, nearby APs are using the same channel, the result can be a slowdown in data transfer for both systems. Add to this many wireless phones, baby monitors, and microwave ovens, all operating in this same 2.4 GHz Industrial, Scientific, and Medical (ISM) band and you can imagine the resulting interference issues possible.

    Reply
16. February 23, 2015 at 10:20 am

    Tomi Engdahl says:

    Cable tips for your next measurement
    http://www.edn.com/design/test-and-measurement/4438691/Cable-tips-for-your-next-measurement?_mc=NL_EDN_EDT_EDN_analog_20150219&cid=NL_EDN_EDT_EDN_analog_20150219&elq=eb12e6edd18d487a943e60b3482926e3&elqCampaignId=21718

    Choosing the right instrument and using the proper measurement techniques are essential to getting the precise results. However, one common limitation lays directly between the device under test (DUT) and the test instrument: the cable. I often recommend to engineers that they should not skimp on cables. Purchase “good” ones; it will save money in the long run. In this article I’ll show you that while this may be sound advice, the purchase of a “good” cable alone may not be sufficient.

    Cable Selection Criteria
    We typically purchase cables based on a short list of parameters. These routinely include:
    • Characteristic impedance
    • Usable frequency range (which relates to associated losses)
    • Connectors
    • Flexibility
    • Cost

    Sure there are a few other parameters, such as velocity factor, precise delay time, and operating temperature range. In some cases, we might even have our cables fabricated by any one of the numerous cable assembly companies that allow you to choose the coaxial cable, length, and connectors.

    An instrument that has an SMA receptacle can generally mate with either 2.92mm or SMA male connectors. An instrument with a 2.92mm receptacle can be irreparably damaged easily by mating it with an SMA male connector. As an aside, I regularly suggest that a calibrated torque wrench be used to assure good quality connections.

    If you can’t afford top quality new cables, you can often find high-quality used cables on Ebay. Be sure to check the return policy

    So Let’s Test Some Cables

    Conclusion
    This article demonstrated some of the common issues with low quality cables and hopefully convinced you that in addition to purchasing high quality cables, you should also test cables immediately after receiving them and at regular intervals during the life of the cable. It will save many wasted hours troubleshooting bad cables as well as eliminating a source of frustration. These cable imperfections can result in signal reflections, loss of bandwidth, and early life cable failures. They are easily seen using a TDR instrument.

    Reply
17. February 23, 2015 at 10:20 am

    Tomi Engdahl says:

    Avago Tech Note: Optocouplers in intrinsic safety applications
    http://www.edn.com/design/components-and-packaging/4438666/Avago-Tech-Note–Optocouplers-in-intrinsic-safety-applications?_mc=NL_EDN_EDT_EDN_analog_20150219&cid=NL_EDN_EDT_EDN_analog_20150219&elq=eb12e6edd18d487a943e60b3482926e3&elqCampaignId=21718

    Reply
18. February 23, 2015 at 10:44 am

    Tomi Engdahl says:

    Ultra-low power system for wearable devices
    http://www.edn.com/design/analog/4438646/Ultra-low-power-system-for-wearable-devices?_mc=NL_EDN_EDT_EDN_systemsdesign_20150218&cid=NL_EDN_EDT_EDN_systemsdesign_20150218&elq=76b47d8115734b278622b23d1e1c420e&elqCampaignId=21692

    While the brains of the typical wearable device might be the embedded microcontroller (MCU), the heart is definitely with power management. Extremely small capacity batteries, diverse array of functions needing power, and the incredibly small solution size force new and innovative power management solutions to make the system work well. But when an ultra-low power optimized MCU and ultra-low power optimized DC/DC converter come together, the result is a well-running, well-oiled machine fit for wearable applications.

    A wearable device brings together multiple facets of engineering, beginning with the MCU and its integrated features and peripherals. Temperature sensors, analog-to-digital converters (ADCs), display drivers, a Bluetooth® Low Energy (BLE) radio, and even encryption are frequently integrated into the MCU. Other sensors such as accelerometers or pressure sensors are usually implemented discretely due to their system-specific nature. The MCU and sensors define the features and capabilities of the wearable device, which gives it its appeal and niche in the market.

    For a very small wearable device, the heart of the system is the power management. A wearable device can lose its appeal if it must be recharged multiple times a day or has a heavy battery pack. Achieving multi-day run times and keeping the device small and light requires ultra-low power-optimized power management to efficiently convert the battery’s limited energy to useable power by the loads.

    Reply
19. February 23, 2015 at 10:44 am

    Tomi Engdahl says:

    Regulatory testing and certification
    http://issuu.com/eeweb/docs/02-2015_wireless_pages_1/19?e=7607911/11467666

    Reply
20. February 23, 2015 at 10:58 am

    Tomi Engdahl says:

    GlobalFoundries Teams with IMEC on RF CMOS
    http://www.eetimes.com/document.asp?doc_id=1325709&

    GlobalFoundries has announced a partnership with nanoelectronics research center IMEC for joint research on future radio architectures and designs for highly integrated mobile devices and IoT applications.

    Today, a typical mobile device must support up to 28 bands for worldwide 2G, 3G, 4G, LTE network connectivity, and more complex carrier aggregation schemes and additional frequency bands are expected for future generations.

    These challenges are driving the need for an agile radio that integrates many of the separate components into one piece of silicon, including power amplifiers, antenna switches, and tuners and provides a solution which is both flexible and low cost.

    Reply
21. February 23, 2015 at 10:59 am

    Tomi Engdahl says:

    Samsung Makes New Package for Smartphones
    http://www.eetimes.com/document.asp?doc_id=1325704&

    Samsung is now mass-producing a new memory package aimed at high-end smartphones that will save space by putting DRAM and eMMC together.

    The embedded package-on-package, dubbed ePoP, is a single memory package consisting of 3GB LPDDR3 DRAM, 32GB eMMC and a controller, combining all of the essential memory components into a one package that can be stacked directly on top of the mobile processor (see Figure). The 3GB LPDDR3 mobile DRAM inside the ePoP operates at an I/O data transfer rate of 1,866Mb/s with a 64-bit I/O bandwidth.

    Samsung’s smartphone ePoP does not need any space beyond the 225 square millimeters taken up by the mobile application processor, so it reduces the total footprint by approximately 40% as compared to a conventional PoP that takes up the same space with just a mobile processor and DRAM and a separate eMMC package, for a total of 374.5 square millimeters.

    Reply
22. February 23, 2015 at 12:10 pm

    Tomi Engdahl says:

    Intel promises to 7 nanometer chips

    San Francisco ISSCC conference presented this week in semiconductor technology solutions for the future. Intel promises performances that Moore’s Law is still alive, at least until 2018. At the moment, Intel manufactures chips in the volumes of 14-nanometer process. The company’s research guru Mark Bohr now promises that in 2016 it is the turn of 10 nanometers. And in 2018, Intel moves to 7 nanometers.

    According to Bohr’s seven nanometers is achieved without any new, exotic fabrication techniques. In practice, this means that 7 nanometers does not require the EUV-litography equipment.

    Intel’s 10-nanometer pilot production line already works well.

    Source: http://www.etn.fi/index.php?option=com_content&view=article&id=2463:intel-lupaa-jo-7-nanometrin-siruja&catid=13&Itemid=101

    Reply
23. February 23, 2015 at 12:20 pm

    Tomi Engdahl says:

    Weapons keeps the the Russian electronics alive

    The crisis in Ukraine due to Russia Economic sanctions hit badly in the Russian electronics industry. The weakening of the ruble value of the higher prices. If the arms industry would not buy more systems, the electronics would be an even greater crisis.

    International electronics components distributors in the organization of the IDEA (International Distribution of Electronics Association) says a news letter that last year’s third quarter, foreign components, the price jumped several tens of percent up.

    Russian electronics manufacturers are currently living in state orders. The defense industrial systems, the price of 5 to 10 per cent consists of components imported from abroad. Increase the value of the ruble falling Russian weapons systems cost about 5 per cent, of IDEA newsletter evaluated.

    IT systems and industrial electronics imported components account for 20-30 per cent. Their increase in the price impact of production volumes and component trade is currently very difficult to assess.

    Source: http://www.etn.fi/index.php?option=com_content&view=article&id=2450:aseet-pitavat-venajan-elektroniikkaa-hengissa&catid=13&Itemid=101

    Reply
24. February 23, 2015 at 12:28 pm

    Tomi Engdahl says:

    Programmable FPGA market is almost completely two major manufacturer of Xilinx and Altera’s possession.

    FPGA market is expected to grow to $ 8.5 billion in 2020.

    Silicon Valley kind of Achronix Semiconductor example shows that the industry giants is a very difficult challenge. Now Achronix says it had the volume of supplies of the new flagship parties. Speedster 22i is made ​​of Intel’s 22nm process.

    Source: http://www.etn.fi/index.php?option=com_content&view=article&id=2440:uusi-piiri-haastaa-fpga-jatit&catid=13&Itemid=101

    Reply
25. February 23, 2015 at 12:33 pm

    Tomi Engdahl says:

    More than 10 billion LED lamps

    Research Institute under the old connectors (incandescent and fluorescent lamps) lamps purchased 15 per cent of the LED based ​​last year. By 2023 the proportion will increase to 74 per cent, that is, the growth potential of LED lamps is huge.

    Led light market is expected to grow this year to 25.7 billion US dollars. Trend Force, one in four LED lamps sold in Europe. China’s market share is 21 per cent.

    According Navigant Research LED based on the lighting of the total deliveries in 2014-2023 will be 10.7 billion the lamp.

    Source: http://www.etn.fi/index.php?option=com_content&view=article&id=2432:yli-10-miljardia-ledilamppua&catid=13&Itemid=101

    Reply
26. February 23, 2015 at 12:49 pm

    Tomi Engdahl says:

    USB Charger also gaining ground in high-power devices

    Cypress Semiconductor says that it has completed the industry’s first new USB interface controller circuits of the samples. C-type USB bus will be a great revolution in the market, because it allows the connection of both ways, as well as 100 watts of charging power transfer.

    Cypress, the CCG1 control circuit based on the programmable PSoC4 system circuit. This driver allows equipment manufacturer may be imported faster 3.1 standard interface according to their device in a few weeks.

    A big change will be in charge performance increase in the previous 3.0 standard of 7.5 watts to 3.1 watts to one hundred. In practice, this means the USB charger concept for the expansion of a much more more powerful devices.

    Market forecasts indicate that USB Type-C drivers are sold this year, 65 million dollar market moves forward. In 2019 driver circuits goes devices for 350 million dollars.

    Source: http://www.etn.fi/index.php?option=com_content&view=article&id=2400:usb-laturi-yleistyy-myos-suuritehoisissa-laitteissa&catid=13&Itemid=101

    Reply
27. February 23, 2015 at 1:44 pm

    Tomi Engdahl says:

    Photometallization allows one-step production of touchscreen circuitry
    http://www.edn.com/electronics-blogs/tech-edge/4438712/Photometallization-allows-one-step-production-of-touchscreen-circuitry?_mc=NL_EDN_EDT_pcbdesigncenter_20150223&cid=NL_EDN_EDT_pcbdesigncenter_20150223&elq=7ad24c37e15f4e899788ae6290c625d6&elqCampaignId=21761

    Researchers at INM, the Leibniz Institute for New Materials, based in Saarbrücken, Germany, are using photometallization to create microscopic and macroscopic conductor tracks that are used in touchscreens for detecting the position of a user’s finger. Advantages of the low-cost process are that it is quick, flexible, variable in scale, and environmentally friendly, according to the researchers. They presented their findings during nano tech 2015, Jan 28-30, in Tokyo.

    Reply
28. February 24, 2015 at 8:02 am

    Tomi Engdahl says:

    Field-Oriented Motor Control: Historical Foundations
    http://www.eetimes.com/author.asp?section_id=36&doc_id=1325757&

    In the first of a series on motor control, Dave looks at the technology developments leading to field oriented control.

    Reply
29. February 24, 2015 at 8:03 am

    Tomi Engdahl says:

    3D E-Beam Enables 3D NAND Flash
    To allow foundries to catch up to Intel in FinFETs
    http://www.eetimes.com/document.asp?doc_id=1325760&

    The world’s largest equipment supplier for semiconductors, displays, and solar cells, Applied Materials Inc., claims to have uniquely solved the most pressing problems facing 3D flash chip stacks and 3D FinFETs for everybody. A paper on AM’s technique was presented today at the International Society for Optics and Photonics (SPIE) in San Jose, Calif.

    3D NAND flash memory and 3D FinFET transistors have been enabled by critical-dimension scanning electron microscopy (CD-SEM). By applying techniques only recently proven effective in the research lab, AM’s new VeritySEM 5i could not only allow semiconductor makers to catch up with Intel in FinFETS but also to finally enable 3D flash memory cubes to be brought to the mass market.

    “The industry is transitioning from 2D to 3D,” Ofer Adan, global product and technology manager for PDC told EE Times. “So we have the logic guys transitioning to 3D transistors — FinFETS — and the memory guys are transitioning from 2D NAND flash to 3D NAND flash where you stack your NAND device vertically.”

    Reply
30. February 24, 2015 at 8:04 am

    Tomi Engdahl says:

    Chip Packs 100, 64-bit ARM Cores
    200G Tilera-MX joins ARM party
    http://www.eetimes.com/document.asp?doc_id=1325714&

    EZchip will pack a hundred 64-bit ARM A53 cores into a network processor competing for sockets in servers and communications systems with the likes of Broadcom, Cavium and Intel. The 200 Gbit/second Tile-Mx100 could outgun most if not all competitors despite the fact it will be made in a 28nm process and probably won’t be in production until 2017.

    The chip is based on the Tile-Gx multicore architecture EZchip acquired in July from Tilera. Besides moving Tile-Gx from a proprietary to an ARM core, the new generation adopts some key blocks from EZchip such as a traffic manager it hopes helps it stand apart from its larger competitors.

    “No one else we know of has announced a 100-core ARM v8 processor, so it will be one of the most powerful networking processors out there,” said Tom Halfhill, senior analyst with market watcher The Linley Group (Mountain View, Calif.)

    Cavium will deliver later this year its ThunderX, a 48-core chip using a single-threaded 64-bit ARM core. Broadcom is designing a competing 16nm chip based on multi-threaded superscalar ARM cores expected to be in production next year. Its existing XLP980 chip using 20 MIPS cores is already a heady competitor because its quad-threaded architecture enables it to handle many packet flows.

    Reply
31. February 24, 2015 at 8:07 am

    Tomi Engdahl says:

    8-bit MCUs Stake New Claim in IoT
    http://www.eetimes.com/document.asp?doc_id=1325767&

    Falling costs for 32-bit microcontrollers (MCUs) has prompted considerable speculation about them displacing 8-bit MCUs for new designs. But 8-bit MCUs aren’t nearly dead yet. Silicon Labs just announced at Embedded World a new series of 8-bit MCUs that target a range of cost-, power-, and space-sensitive applications in the Internet of Things (IoT).

    “We’ve been working to provide performance, value, and ease-of-use for IoT developers,” said Pannell. “The 8-bit architecture is easier to use than others, and offers lower cost and power. Our high-speed, pipelined 8051 core provides the performance.”

    The company also sees the 8-bit market as still thriving. The company quoted a report from Tom Hackenberg of market research firm IHS indicating that 8-bit devices will retain a third of the MCU market for several more years. Indeed, IHS expects the market to growing in value, reaching $7.8 billion in 2018.

    Reply
32. February 24, 2015 at 10:09 am

    Tomi Engdahl says:

    TwinTeeth: The Delta Bot PCB Factory
    http://hackaday.com/2015/02/23/twinteeth-the-delta-bot-pcb-factory/

    There are a few all-in-one CNC/milling/plotting/3D printing/engraving bots out there that claim to be mini factories for hobbyists, prototypers, and other homebrew creators. The latest is Diyouware’s TwinTeeth, a bot obviously inspired by a few 3D printers, but something that has a few interesting features we hope will propagate through the open hardware ecosystem.

    One very interesting feature of this bot is the ability to mask off PCBs for chemical etching with a BluRay laser diode. This actually works pretty well

    Diyouware TwinTeeth: The PCB mini-factory
    Diyouware TwinTeeth is a open-source PCB mini-factory targeted to the electronic
    http://hackaday.io/project/4409-diyouware-twinteeth-the-pcb-mini-factory

    Reply
33. February 24, 2015 at 11:49 am

    Tomi Engdahl says:

    Voltera: Your Circuit Board Prototyping Machine
    https://www.kickstarter.com/projects/voltera/voltera-your-circuit-board-prototyping-machine

    Print your circuit boards, dispense solder paste, and reflow! The Voltera V-One lets you go from concept to creation in minutes.

    Reply
34. February 24, 2015 at 12:49 pm

    Tomi Engdahl says:

    Intel Moving Forward With 10nm, Will Switch Away From Silicon For 7nm
    http://hardware.slashdot.org/story/15/02/24/011256/intel-moving-forward-with-10nm-will-switch-away-from-silicon-for-7nm

    Intel has begun talking about its plans for future CPU architectures. The company is already working on a 10nm manufacturing process, and expects the first such chips to be ready by early 2017.

    Beyond that, things are getting difficult. Intel says it will need to move away from silicon when it develops a 7nm process. “The most likely replacement for silicon is a III-V semiconductor such as indium gallium arsenide (InGaAs)”

    Intel forges ahead to 10nm, will move away from silicon at 7nm
    To keep up with Moore’s law, Intel is looking at new materials, 3D packaging.
    http://arstechnica.com/gadgets/2015/02/intel-forges-ahead-to-10nm-will-move-away-from-silicon-at-7nm/

    This week at the 2015 International Solid-State Circuits Conference (ISSCC), Intel will provide an update on its new 10nm manufacturing process and new research on how it’s maintaining the march of Moore’s law to 7nm and beyond. The first chips based on Intel’s new 10nm process are expected in late 2016/early 2017, and the company says it’s hoping to avoid the delays that haunted the belabored release of 14nm Broadwell. To hit 7nm, Intel says new materials will be required—as in, it looks like 10nm will finally be the end of the road for silicon. The most likely replacement for silicon is a III-V semiconductor such as indium gallium arsenide (InGaAs), though Intel hasn’t provided any specific details yet.

    Due to other constraints—thermals, power consumption, and form factor—Intel is also looking into new types of packaging: 2.5D, where separate dies are placed side by side on an interposer, and 3D, where each die is stacked directly on top of each other. Both 2.5D and 3D packaging are good for reducing power consumption, with 3D really coming into its own with mobile and wearable devices.

    Reply
35. February 24, 2015 at 12:59 pm

    Tomi Engdahl says:

    Memory Underdogs Rise by 2020
    http://www.eetimes.com/author.asp?section_id=36&doc_id=1325705&

    Emerging kinds of non-volatile memory chips will get traction in mainstream applications by 2020, but DRAM and NAND will continue to dominate for years.

    The global market for today’s emerging non-volatile memory (NVM) technologies will expand from $65 million in 2014 to $7 billion by 2020, an impressive rise of more than 118% per year. However, this business will represent less than 10% of the total 2020 memory market, so there’s still a long way to go before the newcomers replace today’s NAND flash and DRAM chips.

    Memory chips are key building blocks in everything from cameras to cars. Thus standalone chips represent one of the largest semiconductor market segments, totaling $78 billion last year, according to our January report. The need for memory will surge in the next few years especially thanks to the continued explosion in Internet traffic driven by the rising number and use of connected devices.

    NAND and DRAM are well established, but their scalability is becoming increasingly complex and problematic.

    So far, sales of MRAM/STTMRAM and RRAM are still limited mainly to niche industrial and wearable markets due to their limited density.

    Improving scalability and therefore price per gigabit is the key to winning mainstream NAND and DRAM applications. Currently, limited product densities increase the price per gigabit to several $100/Gbit, a limiting factor for mass market adoption since NAND and DRAM chips cost less than $1/Gbit.

    In the next five years, scalability and chip density of the new memories will be greatly improved, and this will open up many new applications.

    Enterprise storage will be the killer market by far for emerging NVM chips in 2020. The new technologies will greatly improve data center storage performance, where requirements are intensifying as traffic rises.

    Microcontrollers for wearables, smart cards and other markets will increasingly adopt the emerging memories as the scaling of embedded MCU flash runs out of steam, especially after 2018 at the 28nm node.

    Reply
36. February 25, 2015 at 7:17 am

    Tomi Engdahl says:

    MediaTek Push into Global LTE Not Likely Until 2016, Analyst Says
    http://www.eetimes.com/document.asp?doc_id=1325795&

    The aggressive push by MediaTek, Taiwan’s largest smartphone chip designer, to enter the global long-term evolution (LTE) market in competition with leader Qualcomm of the U.S. is not likely to show significant results until 2016, according to Randy Abrams, Taiwan head of equities research for Credit Suisse.

    “MediaTek’s ramp in developed markets may take until next year to have some traction as some of its China-based customers will start from China on LTE and are still focusing exports on 3G into emerging markets still ramping from feature phones to smartphones,” Abrams said in comments to EE Times. “The company indicated that it is still working on U.S. carriers for certification later in the year,” he said.

    The baseband chip business has been a snake pit for companies such as Broadcom, STMicroelectronics and Renesas, which have exited the competition due to the need for qualification by global smartphone vendors as well as cellular network operators.

    MediaTek’s push into LTE will face additional challenges as Qualcomm will work to maintain its competitive edge, according to Abrams.

    Reply
37. February 25, 2015 at 7:18 am

    Tomi Engdahl says:

    TSMC to Start 10nm in 2017, Closing Gap with Intel
    http://www.eetimes.com/document.asp?doc_id=1325787&

    Taiwan Semiconductor Manufacturing Co. (TSMC), the world’s largest chip foundry, said that it expects to start 10 nanometer production in 2017, when it will have process technology matching that of industry leader Intel Corp.

    “The performance of our 10nm, in terms of speed, power and density will be equal to what we believe Intel will define as its 10nm technology,” TSMC Director of Corporate Communications Elizabeth Sun told EE Times. “Technology-wise, we think we can close the gap at 10nm.”

    For the first time this year, TSMC is expected to have the largest capex in the semiconductor industry as it aims to maintain its lead in the foundry business against rivals such as Samsung, Intel and Global Foundries.

    Reply
38. February 25, 2015 at 7:22 am

    Tomi Engdahl says:

    Freescale v. Too Many Others
    http://www.eetimes.com/author.asp?section_id=182&doc_id=1325796&

    Freescale gets “typ” and “max” right for their Kinetis family.

    One of my pet peeves is when a datasheet lists ‘typical’ values with no min or max. I’ve written about this a couple of times

    Sometimes the results are almost laughable.

    Maximum values are especially rare in the domain of ultra-low power MCUs. Vendors are in a real slugfest to prove their parts have lower sleep currents than the competitors, and too often “typ” is the only rating given for this critical parameter.

    The careful designer is left scratching his head, with no idea what sort of results he’ll see in a real-world application.

    Hats off to Freescale.

    Wow! A year or so ago I asked several semi-vendors what ‘typical’ means and none could define it.

    Reply
39. February 25, 2015 at 7:23 am

    Tomi Engdahl says:

    Samsung Wants Moore’s Law End, Analyst Says
    http://www.eetimes.com/author.asp?section_id=36&doc_id=1325790&

    Rather than fearing the future, Samsung may be looking forward to inventing it.

    Samsung Electronics, the world’s largest smartphone maker, may be looking forward to the end of Moore’s Law as a way to gain a new competitive edge, according to Mehdi Hosseini, an analyst with Susquehanna International Group.

    Rather than fearing the future, however, Samsung may be looking forward to inventing it, according to Hosseini. South Korea’s biggest company expects the crash of Moore’s Law to open competitive advantages in new technologies such as flexible displays as early as 2015, he says.

    “The battleground will become very interesting next year,”

    Within the next two years, the competitive edge in the smartphone business will not be about the chips that go into handsets, he says. Instead, it will be about the display, user friendliness and form factor.

    Apple Inc., which makes more than 90 percent of the profit in the smartphone business, would probably be the first company to feel the heat if Samsung’s bet comes true, Hosseini says. Apple, unlike Samsung, outsources all of its manufacturing.

    Reply
40. February 25, 2015 at 7:43 am

    Tomi Engdahl says:

    Your Next Analog Output Design Is Ready
    http://www.maximintegrated.com/en/products/all-products/campaigns/solutions/analog-output.html?utm_source=EEWeb%20Feb%202015%20Newsletter&utm_medium=text%20ad&utm_content=MAX15500&utm_campaign=Q215AOSolutions

    Signal conditioner. DAC. Voltage reference. Isolator. Your PLC analog output can be compromised if even one of these components isn’t carefully designed and integrated—but that can take months.

    MAXREFDES24EVSYS Design Accelerator Kit
    What’s Inside

    4-Channel, 16-Bit, Isolated Analog-Output Reference Board
    USB-to-Pmod™ Adapter
    2-Channel Capture Board for Voltage/Current
    24V DC Supply with International Plugs
    Wire Clips and USB Cables
    USB Stick with Software GUI and Documentation Files

    Reply
41. February 25, 2015 at 7:44 am

    Tomi Engdahl says:

    Small Currents? Big Accuracy
    Current Sense Amp with a Wider Common-Mode Input Range
    http://www.maximintegrated.com/en/products/all-products/campaigns/focus-products-q315/small-currents-big-accuracy.html?utm_source=EEWeb%20Feb%202015%20Newsletter&utm_medium=text%20ad&utm_content=MAX44284%20Read%20More&utm_campaign=Focus%20Products%20Q3-15

    The MAX44284 current sense amp combines high accuracy and a wide input common mode range. You get precision, low-power performance—with the ease of design you’ve come to expect from Maxim.

    Reply
42. February 25, 2015 at 7:44 am

    Tomi Engdahl says:

    Too Soft? Too Loud? We Hear You
    Microphone Amp with Automatic Gain Control
    http://www.maximintegrated.com/en/products/all-products/campaigns/focus-products-q315/too-soft-too-loud-we-hear-you.html?utm_source=EEWeb%20Feb%202015%20Newsletter&utm_medium=text%20ad&utm_content=MAX9814%20Read%20More&utm_campaign=Focus%20Products%20Q3-15

    Less clipping always sounds great. The MAX9814 mic amp comes with integrated AGC to stop loud sounds from distorting, yet give quiet ones a boost.

    Reply
43. February 25, 2015 at 3:18 pm

    Tomi Engdahl says:

    Silicon debug challenges and guidelines
    http://www.edn.com/electronics-blogs/day-in-the-life-of-a-chip-designer/4438729/Silicon-debug-challenges-and-guidelines?_mc=NL_EDN_EDT_EDN_today_20150224&cid=NL_EDN_EDT_EDN_today_20150224&elq=2e92b19eb6a44551b55e5ff72e2ac959&elqCampaignId=21782&elqaid=24456&elqat=1&elqTrackId=2d0f711a50a04e87be5cd0ce07e36e31

    Reply
44. February 25, 2015 at 3:19 pm

    Tomi Engdahl says:

    European semiconductor research in crisis

    The European Union is an ambitious project, which aims at the restoration of the old continent semiconductor manufacturing on the map. New research figures show that the achievement is virtually impossible. European research is in crisis.

    The ten largest semiconductor companies invested last year in research and development of $ 31.8 billion

    The ten largest researcher on the list of five Americans, three from Asia and only one company in Japan and Europe. The only company in the top 10 list is STMicroelectronics, which is also cut in research expenditure by 16 per cent last year.

    Source: http://www.etn.fi/index.php?option=com_content&view=article&id=2478:euroopan-puolijohdetutkimus-kriisissa&catid=13&Itemid=101

    Reply
45. February 25, 2015 at 3:21 pm

    Tomi Engdahl says:

    FPGA circuits to 16 nanometers

    FPGA manufacturer Xilinx has introduced the industry’s first 16-nanometer process produced FPGA.

    Functional chips from Xilinx expects to have during this year.

    The new family is called UltraScale +. It is imported as well as high for lower end Virtex-circuits that cost-effective Kintex-chips. The most interesting and most advanced version of the new system, however, the circuit Zynq. It takes FPGA integration and performance to a level that has not been seen before.

    16 nm Xilinx brings a new memory for FPGA chips, which it calls the UltraRAM.
    IP blocks are connected to each other in the Smart Connect interface.

    The first full UltraScale + exported silicon chip production line yet still summer and the end of the year, the company has in its hands working 16-nanometer chips manufactured by TSMC.
    Source: http://www.etn.fi/index.php?option=com_content&view=article&id=2475:fpga-piiri-16-nanometriin&catid=13&Itemid=101

    Reply
46. February 26, 2015 at 8:26 am

    Tomi Engdahl says:

    TechInsights: Non-Stop Innovation in Chip Packaging
    http://www.eetimes.com/document.asp?doc_id=1325656&

    The semiconductor industry is entering the era of Internet of Things (IoT), where integration of sensing and actuation systems along with low power radio devices must be combined in a single package. For a large number of applications, the control of the devices will probably be done by handheld devices, so the overall footprint of the package is critical. The need for high performance multifunctional devices in a single package is pushing the industry to innovate in multi-chip packaging. This high level of integration has presented an enormous challenge, because all the individual components in the package must contact between their respective bond pads and the external board.

    To adapt to the needs of multifunctional devices, the packaging industry has attempted several approaches like package on package, silicon interposers and embedded package. Percolation of these varieties of packages into the market is indicating that the packaging industry is getting ready for the era of IoT where its contribution will be enormous, especially from the sector of multi-chip packaging.

    Reply
47. February 26, 2015 at 8:27 am

    Tomi Engdahl says:

    Flex Logix Introduces FPGA IP Cores for SoC Designs
    http://www.eetimes.com/document.asp?doc_id=1325814&

    Today’s system-on-chip (SoC) devices are pretty incredible: they have great capacity and performance, along with improved cost, time, and resources associated with their design and verification. But at least one problem remains. Any algorithms an SoC implements are effectively “frozen in silicon,” which makes it difficult to accommodate constantly evolving communication protocols, for example.

    Also, a problem arises with an SoC design, missing a product cycle can cost untold millions of dollars in revenue. A very common solution is for the SoC to have an associated field programmable gate array (FPGA) sitting alongside it on the circuit board. The advantage of the FPGA’s programmable fabric is that it can be reconfigured to fix problems and to address evolving algorithms. The disadvantages of using a standalone FPGA in the system are additional cost, additional power consumption, and bigger circuit boards.

    The obvious solution is to embed one or more FPGA IP cores inside the SoC. This solution is so obvious, in fact, that it’s been tried many times before.

    Of course, a big consideration is the associated price-tag. A MCU manufacturer is not going to be interested in taking a $1 MCU and adding a $5 FPGA core into it, for example. So how much does all this cost? Well, Flex Logix says a single EFLX-100 can be had “for less than a cent,” while a single EFLX-2.5K would add less than 15 cents to the cost of an SoC.

    Reply
48. February 26, 2015 at 8:32 am

    Tomi Engdahl says:

    5 Power Trends Will Pay Off Soon
    http://www.eetimes.com/author.asp?section_id=36&doc_id=1325373&

    Reply
49. February 26, 2015 at 1:27 pm

    Tomi Engdahl says:

    Developers Disclose Schematics For 50-1000 MHz Software-Defined Transceiver
    http://hardware.slashdot.org/story/15/02/25/2255225/developers-disclose-schematics-for-50-1000-mhz-software-defined-transceiver

    Chris Testa KD2BMH and I have been working for years on a software-defined transceiver that would be FCC-legal and could communicate using essentially any mode and protocol up to 1 MHz wide on frequencies between 50 and 1000 MHz.

    http://linux.slashdot.org/story/15/01/07/232232/learn-gate-array-programming-in-python-and-software-defined-radio
    Chris Testa KB2BMH taught a class on gate-array programming the SmartFusion chip, a Linux system and programmable gate-array on a single chip, using MyHDL, the Python Hardware Design Language to implement a software-defined radio transceiver.

    http://algoram.com/presentations/Hamcation2015.pdf

    Reply
50. February 27, 2015 at 7:47 am

    Tomi Engdahl says:

    Hi-Speed Transistors from Liquid Processing
    New world record set at 10X electron mobility
    http://www.eetimes.com/document.asp?doc_id=1325826&

    A new world record has been set by liquid-processed transistors produced at only a few hundred degrees Celsius. Based on a new kind of inorganic solder that adapts to disparate semiconductors, a “miracle solder” is being used by researchers to connect semiconductors that were previously unsolderable. The solder also can be used in an additive manner to create new semiconducting materials by joining their powdered forms into a continuous single-crystal-like material, and the stuff can even be used in 3D printers to join materials that were formerly incompatible.

    The miracle solder was invented at the University of Chicago, in collaboration with Argonne National Laboratory and the Illinois Institute of Technology.

    “Our ‘solder’ is an inorganic soluble material that can be applied as liquid and turns into an inorganic semiconductor upon mild heating,” professor Dmitri Talapin told EE Times. “The trick was to find a chemical that is soluble, reactive and does not contaminate semiconductor surfaces.”

    Reply