Can RISC-V – Linux of Microprocessors – Start an Open Hardware Renaissance?

RISC-V is an interesting open hardware CPU. It is the most promising open CPU design, but can it succeed in competitive CPU market? 


  1. Tomi Engdahl says:

    USA haluaa nyt estää kiinalaisilta RISC-V:n

    Yhdysvallat pitää Kiinaa suurimapan turvallisuusuhkana. Nyt amerikkalaiset senaattorit etsivät keinoa estää avoimen RISC-V-arkkitehtuurin käyttö Kiinassa. Maan hallituksen perustama komitea tutkiii nyt, mitä olisi tehtävissä.

    Esimerkiksi New York Times kertoo, että NASA on valinnut RISC-V-tekniikan auttaakseen tulevien avaruusalusten laskeutumista kartoittamattomille planeetoille. Meta käyttää sitä tekoälyn toteutuksiin. Samalla kiinalaiset kehittävät RISC-V-pohjaista datan salausta.

    RISC-V on käynnistänyt Washingtonissa viime kuukausina uuden keskustelun siitä, kuinka pitkälle Yhdysvallat voi tai pitäisi mennä, kun se jatkuvasti laajentaa rajoituksia teknologian viennille Kiinaan. Tämä johtuu siitä, että RISC-V:stä, jonka voi ladata Internetistä ilmaiseksi, on tullut keskeinen työkalu kiinalaisille yrityksille ja valtion laitoksille.

    - Jos emme laajenna vientivalvontaamme koskemaan tätä uhkaa, Kiina ohittaa meidät jonakin päivänä maailman johtavana sirusuunnittelun valmistajana, sanoi republikaanisenaattori Marco Rubio.

  2. Tomi Engdahl says:

    Microchip vie RISC-V:n avaruuteen

    Tämän vuoden loppuun mennessä maailmassa on jo 62,4 miljardia avoimeen RISC-V-arkkitehtuuriin perustuvaa prosessoria. Suurin osa näistä laitteista sisältää sovelluskohtaisia ​​ja mukautettuja RISC-V-ytimiä. Osa siruista tulee olemassa avaruudessa, näyttää Microchip.

    Avaruuteen ei voida lähettää mitä tahansa siruja, vaan piirien täytyy kestää avruuden säteilyjä. Microchip kertoo nyt ottaneensa säteilynkestävän eli RT-version PolarFire-sarjan FPGA-järjestelmäpiiristään. Tälle RT PolarFire FPGA:lle on kehitetty ensimmäinen Linux-yhteensopiva, RISC-V-pohjainen mikroprosessorialijärjestelmä.

  3. Tomi Engdahl says:

    Decapsulating the CH32V203 Reveals a Separate Flash Die
    The CH32V203 is a 32bit RISC-V microcontroller. In the produt portfolio of WCH it is the next step up from the CH32V003, sporting a much higher clock rate of 144 MHz and a more powerful RISC-V core with RV32IMAC instruction set architecture. The CH32V203 is also extremely affordable, starting at around 0.40 USD (>100 bracket), depending on configuration.

  4. Tomi Engdahl says:

    RISC-V support in Android just got a big setback
    A Googler just uploaded a series of patches that remove the Android kernel’s support for the RISC-V architecture.

  5. Tomi Engdahl says:

    WCH CH32V006 RISC-V microcontroller adds more I/Os, memory, and storage compared to CH32V003
    WCH CH32V006 RISC-V microcontroller is an upgrade to the 10-cent CH32V003 microcontroller with more I/Os, up to four times the memory, storage, a wider supply voltage range, the addition of a TouchKey interface, as well as a new 32-bit V2C RISC-V core instead of the V2A core found in the CH32V003.

    More specifically that means we went from the CH32V003 with 2KB SRAM and 8KB flash, up to 8KB SRAM and 62KB for the CH32V006, and 6KB SRAM and 32KB flash for the CH32V005, a smaller sibling of the new RISC-V microcontroller.

  6. Tomi Engdahl says:

    Looks Like Arch Linux Is Going To Officially Support ARM/RISC-V
    Arch Linux is making better efforts to support newer architectures.

  7. Tomi Engdahl says:

    Olimex Unveils the RVPC, a Near-One-Dollar All-in-One RISC-V Retro-Style Computing Platform
    Designed as an accessible soldering kit and a platform for RISC-V experimentation, the RVPC will sell for just one Euro.

  8. Tomi Engdahl says:

    Ubuntu 24.04 Arrives on Mars – the Milk-V Mars (RISC-V Computer)

    Ubuntu 24.04 is now available for the Milk-V Mars RISC-V single board computer (SBC).

    RISC-V is an open-source processor specification, allowing anyone to access its design to create their own chips without paying licensing fees or royalties. Much like a Linux distro, people are able to collaborate, contribute, and build on RISC-V to improve it.

    And while ARM (which I’m sure you’ve heard of) and RISC-V fall under the RISC (Reduced Instruction Set Computer) umbrella, RISC-V touts a unique, modular architecture. Its base instruction set is extensible, allowing it to be tailored or optimised for specific uses.

    And thanks to a new partnership with MilkV, the makers of the Milk-V Mars SBC, Ubuntu is to become reference OS for the company’s new RISC-V products — a smart team-up since Ubuntu already runs on a number of other RISC-V devices.

  9. Tomi Engdahl says:

    Why RISC-V must get its messaging right on open standard vs open source
    It’s the difference between export limits on specific chips – and a problematic blanket ban

    The possibility of America placing sanctions on RISC-V has increased the pressure on RV’s governing body and its partners to get their messaging right about what this technology really is.

    One of the primary tools of the US and China in their trade war is placing sanctions against each other. The United States and its allies have prevented China from importing certain advanced processors, tools for making chips, and intellectual property for chipmaking and AI. In retaliation, China has banned certain Western-made semiconductors from the country, and has been supporting efforts to make everything it needs in the Middle Kingdom itself.

    RISC-V International – which oversees the open, royalty-free CPU instruction set architecture RISC-V – has been caught in the middle of this international squabbling. RV is used all across the world, including in America and China. Various US politicians from both the Republican and Democratic parties have voiced their concerns that the open nature of RISC-V allows Chinese companies to take American technology and bypass sanctions.

    The RISC-V community would rather not have its instruction set architecture (ISA) hit with export or import sanctions, as that would affect adoption and encourage fragmentation. It hopes to avoid a crackdown by getting lawmakers, policy wonks, and officials to understand what the community sees as the subtle difference between open source and an open specification.

  10. Tomi Engdahl says:

    Without sanctions to keep it down, RISC-V is expected to expand in the coming years. Analysis firm Omdia predicted AI and automotive sectors will drive adoption of RISC-V chips, and estimates nearly 600 million AI-accelerating RV-compatible CPU cores will be produced annually by 2030. In total, it reckons 17 billion RISC-V chips of all sorts will ship in 2030.

    RISC-V is not exactly fighting for its life, yet. Neither RISC-V International nor orgs using the ISA are too concerned about proposed sanctions coming through – at least not under the Biden administration.

  11. Tomi Engdahl says:

    Forget about Windows on Arm, where’s Windows on RISC-V?
    Windows on Arm is old news at this stage, I want to know about the cutting-edge of architectures.

    Windows on RISC-V is a distant dream due to fragmentation and lack of consumer base.
    Microsoft likely tested Windows on RISC-V internally, but support is not feasible.
    RISC-V, though attractive with no licensing fees, remains niche and far from mainstream use.

    Windows on Arm is finally having its moment thanks to Qualcomm’s Snapdragon X series SoCs, and that’s great for the wider Windows ecosystem. It gives more choice, it competes with Apple on a more level-playing field, and it pushes competitors like Intel and AMD to do better. Now that we’re at this stage with Arm, I think we’re all wondering the same thing: where’s Windows on RISC-V?

    I say that largely in jest, for the record. I don’t expect there to be a Windows on RISC-V build for quite a while, given the fragmentation and other problems associated with the standard at the moment. For example, Ubuntu is available on some RISC-V devices, but there are specific builds of Ubuntu for specific devices as the open standard nature of it means that, sometimes, some SoCs will have features that other SoCs simply don’t support.

    With that said, I do think there’s a conversation to be had about Windows on RISC-V and the efforts that have gone towards making it work.


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